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A new efficient EDA tool design methodology

Published: 01 May 2006 Publication History

Abstract

New sophisticated EDA tools and methodologies will be needed to make products viable in the future marketplace by simplifying the various design stages. These tools will permit system design at a high abstraction level and enable automatic refinement through several abstraction levels to obtain a final prototype. They will have to be based on representations that are clean, complete, and easy to manipulate. In order to develop these new EDA tools, key features such as standardization, metadata programming, reflectivity, and introspection are needed. This work proposes a .Net Framework-based methodology, which possesses all these required key features. This methodology simplifies specification, synthesis, and validation of systems and enables the efficient creation/customization of EDA tools at low cost and development time. We show the effectiveness of this methodology by presenting its application for the design of a new EDA tool called ESys .Net (Embedded System design with .Net). We emphasize the specification and simulation aspects of this tool.

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  • (2015)A Transaction-Based Environment for System Modeling and Parallel SimulationInternational Journal of Parallel Programming10.1007/s10766-013-0303-443:1(24-58)Online publication date: 1-Feb-2015
  • (2012)System modeling and multicore simulation using transactions2012 International Conference on Embedded Computer Systems (SAMOS)10.1109/SAMOS.2012.6404156(41-50)Online publication date: Jul-2012
  • (2012)Computational reflection and its application to platform verificationDesign Automation for Embedded Systems10.1007/s10617-011-9082-616:1(1-17)Online publication date: 1-Mar-2012
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Published In

cover image ACM Transactions on Embedded Computing Systems
ACM Transactions on Embedded Computing Systems  Volume 5, Issue 2
May 2006
253 pages
ISSN:1539-9087
EISSN:1558-3465
DOI:10.1145/1151074
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 01 May 2006
Published in TECS Volume 5, Issue 2

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Author Tags

  1. .Net Framework
  2. C#
  3. CoDesign
  4. ESys.Net
  5. SoC
  6. SystemC
  7. VHDL
  8. attribute programming
  9. embedded systems
  10. modeling and simulation

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Cited By

View all
  • (2015)A Transaction-Based Environment for System Modeling and Parallel SimulationInternational Journal of Parallel Programming10.1007/s10766-013-0303-443:1(24-58)Online publication date: 1-Feb-2015
  • (2012)System modeling and multicore simulation using transactions2012 International Conference on Embedded Computer Systems (SAMOS)10.1109/SAMOS.2012.6404156(41-50)Online publication date: Jul-2012
  • (2012)Computational reflection and its application to platform verificationDesign Automation for Embedded Systems10.1007/s10617-011-9082-616:1(1-17)Online publication date: 1-Mar-2012
  • (2010)ReferencesSystem Level Design with .Net Technology10.1201/9781439812129.bmatt(281-296)Online publication date: 19-Feb-2010
  • (2010)Concept-based partitioning for large multidomain multifunctional embedded systemsACM Transactions on Design Automation of Electronic Systems10.1145/1754405.175440715:3(1-41)Online publication date: 10-Jun-2010
  • (2009)Introspection mechanisms for runtime verification in a system-level design environmentMicroelectronics Journal10.1016/j.mejo.2008.04.01040:7(1124-1134)Online publication date: 1-Jul-2009
  • (2008)Mining metadata for composability of IPs from SystemC IP libraryDesign Automation for Embedded Systems10.1007/s10617-008-9013-312:1-2(63-94)Online publication date: 1-Jun-2008
  • (2007)A computational reflection mechanism to support platform debugging in SystemCProceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1289816.1289838(81-86)Online publication date: 30-Sep-2007
  • (2006)Introspection Mechanisms for Semi-Formal Verification in a System-Level Design EnvironmentProceedings of the Seventeenth IEEE International Workshop on Rapid System Prototyping10.1109/RSP.2006.22(91-97)Online publication date: 14-Jun-2006

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