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Code transformation strategies for extensible embedded processors

Published: 22 October 2006 Publication History

Abstract

Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. In order to satisfy these demands, chip manufacturers often provide developers with the possibility to define application-specific Instruction Set Extensions (ISEs). Many techniques have been proposed that automatically identify the most beneficial ISEs from source code, so that compilers can identify the 'best' instruction set for the underlying machine. However, can we simply retrofit these techniques into a traditional compiler, or does ISE identification demand different tuning of the heuristics utilized throughout the optimization pipeline? In this paper, we show why compilers should sometimes make different decisions when targeting customized processors, and we show how traditional ISE identification techniques can improve significantly if the code is properly transformed in order to expose more beneficial extensions. The proposed approach was validated using the SimpleScalar simulator for the ARM processor, augmented with the possibility to define additional instructions.Using benchmarks taken from the MiBench suite,we show that the proposed transformations improve state of the art ISE identi cation techniques by 55% on average and 4x maximum.

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    cover image ACM Conferences
    CASES '06: Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
    October 2006
    448 pages
    ISBN:1595935436
    DOI:10.1145/1176760
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 22 October 2006

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    Author Tags

    1. ASIPs
    2. compilers
    3. customizable processors
    4. instruction-set extensions

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    ESWEEK06
    ESWEEK06: Second Embedded Systems Week 2006
    October 22 - 25, 2006
    Seoul, Korea

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    Overall Acceptance Rate 52 of 230 submissions, 23%

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    • (2024)Automating application-driven customization of ASIPs: A surveyJournal of Systems Architecture10.1016/j.sysarc.2024.103080148(103080)Online publication date: Mar-2024
    • (2018)Process execution in Cyber-Physical Systems using cloud and Cyber-Physical Internet servicesThe Journal of Supercomputing10.1007/s11227-018-2416-474:8(4127-4169)Online publication date: 1-Aug-2018
    • (2014)Pre-architectural performance estimation for ASIP design based on abstract processor models2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)10.1109/SAMOS.2014.6893204(133-140)Online publication date: Jul-2014
    • (2013)A meta-model assisted coprocessor synthesis framework for compiler/architecture parameters customizationProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485450(659-664)Online publication date: 18-Mar-2013
    • (2013)Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offsACM Transactions on Design Automation of Electronic Systems10.1145/2390191.239020218:1(1-35)Online publication date: 16-Jan-2013
    • (2010)Parallel instruction set extension identification2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel10.1109/EEEI.2010.5662163(000535-000539)Online publication date: Nov-2010
    • (2010)Modern development methods and tools for embedded reconfigurable systemsIntegration, the VLSI Journal10.1016/j.vlsi.2009.06.00243:1(1-33)Online publication date: 1-Jan-2010
    • (2009)Code transformation and instruction set extensionACM Transactions on Embedded Computing Systems10.1145/1550987.15509898:4(1-31)Online publication date: 24-Jul-2009
    • (2009)Introducing control-flow inclusion to support pipelining in custom instruction set extensions2009 IEEE 7th Symposium on Application Specific Processors10.1109/SASP.2009.5226328(114-121)Online publication date: Jul-2009
    • (2008)Exhaustive Enumeration of Legal Custom Instructions for Extensible ProcessorsProceedings of the 21st International Conference on VLSI Design10.1109/VLSI.2008.93(261-266)Online publication date: 4-Jan-2008
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