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Large scale drop impact analysis of mobile phone using ADVC on Blue Gene/L
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Source Conference on High Performance Networking and Computing archive
Proceedings of the 2006 ACM/IEEE conference on Supercomputing table of contents
Tampa, Florida
SESSION: Gordon Bell table of contents
Article No. 46  
Year of Publication: 2006
ISBN:0-7695-2700-0
Authors
Hiroshi Akiba  Allied Engineering Corporation, Japan
Tomonobu Ohyama  Allied Engineering Corporation, Japan
Yoshinoir Shibata  Allied Engineering Corporation, Japan
Kiyoshi Yuyama  Allied Engineering Corporation, Japan
Yoshikazu Katai  Allied Engineering Corporation, Japan
Ryuichi Takeuchi  Allied Engineering Corporation, Japan
Takeshi Hoshino  Allied Engineering Corporation, Japan
Shinobu Yoshimura  University of Tokyo, Japan
Hirohisa Noguchi  Keio University, Japan
Manish Gupta  IBM Thomas J. Watson Research Center
John A Gunnels  IBM Thomas J. Watson Research Center
Vernon Austel  IBM Thomas J. Watson Research Center
Yogish Sabharwal  IBM India Research Laboratory, India
Rahul Garg  IBM India Research Laboratory, India
Shoji Kato  Toshiba Corporation, Japan
Takashi Kawakami  Toshiba Corporation, Japan
Satoru Todokoro  NIWS Co., Ltd., Japan
Junko Ikeda  NIWS Co., Ltd., Japan
Sponsors
IEEE : Institute of Electrical and Electronics Engineers
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Existing commercial finite element analysis (FEA) codes do not exhibit the performance necessary for large scale analysis on parallel computer systems. In this paper, we demonstrate the performance characteristics of a commercial parallel structural analysis code, ADVC, on Blue Gene/L (BG/L). The numerical algorithm of ADVC is described, tuned, and optimized on BG/L, and then a large scale drop impact analysis of a mobile phone is performed. The model of the mobile phone is a nearly-full assembly that includes inner structures. The size of the model we have analyzed has 47 million nodal points and 142 million DOFs. This does not seem exceptionally large, but the dynamic impact analysis of a product model, with the contact condition on the entire surface of the outer case under this size, cannot be handled by other CAE systems. Our analysis is an unprecedented attempt in the electronics industry. It took only half a day, 12.1 hours, for the analysis of about 2.4 milliseconds. The floating point operation performance obtained has been 538 GFLOPS on 4096 node of BG/L.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Hiroshi Akiba: colleagues
Tomonobu Ohyama: colleagues
Yoshinoir Shibata: colleagues
Kiyoshi Yuyama: colleagues
Yoshikazu Katai: colleagues
Ryuichi Takeuchi: colleagues
Takeshi Hoshino: colleagues
Shinobu Yoshimura: colleagues
Hirohisa Noguchi: colleagues
Manish Gupta: colleagues
John A Gunnels: colleagues
Vernon Austel: colleagues
Yogish Sabharwal: colleagues
Rahul Garg: colleagues
Shoji Kato: colleagues
Takashi Kawakami: colleagues
Satoru Todokoro: colleagues
Junko Ikeda: colleagues