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AMD versus Intel: the compiler as referee
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Source Conference on High Performance Networking and Computing archive
Proceedings of the 2006 ACM/IEEE conference on Supercomputing table of contents
Tampa, Florida
SESSION: Exhibitor forum table of contents
Article No. 275  
Year of Publication: 2006
ISBN:0-7695-2700-0
Author
Sponsors
IEEE : Institute of Electrical and Electronics Engineers
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Intel Pentium 4 floating-point capability made x86 systems viable for technical computing. AMD Opteron introduced 64-bit addressing and extended register sets. Intel EM64T added SSE3. These features have all gradually been adopted by both Intel and AMD. This evolutionary process creates temporal binary incompatibilities between AMD and Intel processors. In addition, microarchitecture differences dictate that distinct instruction sequences be used for optimal performance on each processor type. Applications that have many users, or persist in binary form across generations of processors, must execute correctly and perform well on all x86 processors.PGI compilers provide a unique solution by generating multiple versions of time-critical routines. Low-overhead dynamic selection of optimal code paths is enabled in a single PGI Unified Binary. The PGI tools infrastructure supports this scheme seamlessly. This unique feature enables uniformly high performance on both AMD and Intel processors and simplifies builds, validation, distribution and support of x86 applications.