Design and evaluation of a distributed asynchronous VLSI crossbar switch controller for a packet switched supercomputer network

Abstract

A key component in a new high-speed prototype network, called the Multiple Crossbar Network (MCN) being developed at Los Alamos National Laboratory, is a crossbar switching core and its controller. This switching core allows for up to 32 (800 Mbit/second) connections to pass through it simultaneously. The motivation for this network is to allow visualization data to be sent at movie rate speeds to a users workstation from a supercomputer. This paper reviews the key concepts and components of the MCN, and then focuses on the behavioral level design of a distributed asynchronous VLSI controller chip set for the switching core. A unique design methodology is presented and then applied to the controller which uses an externally distributed chip set, and distributed asynchronous finite state machines internally.

References

1. {1} R. Hoebelheinrich and R. Thomsen, "Multiple Crossbar Network: Integrated Supercomputing Framework", in Proceedings of Supercomputing '89, 1989, pp. 713-720.
2. {2} R. Hoebelheinrich and R. Thomsen, "Multiple Crossbar Network: A Switched High-Speed Local Network", in Proceedings of the 14th Local Computer Network Conference, 1989, pp. 285-292.
3. {3} High-Performance Parallel Interface (HIPPI) Mechanical, Electrical, and Signalling Protocol Requirements, ANSI X3T9/88-127 Rev 7.1.
4. {4} High-Performance Parallel Interface (HIPPI) Data Frame Control Requirements, ANSI X3T9/89-146, Rev 2.3.
5. {5} W.F. Hedberg, "The Multiple Crossbar Network Interface", in Proceedings of the 14th Local Computer Networks Conference, 1989, pp. 299-306.
6. {6} Los Alamos National Laboratory internal design documents.
7. {7} W.I. Fletcher, An Engineering Approach to Digital Design, Englewood Cliffs, N.J.: Prentice-Hall, 1980.

Index Terms

• Computer systems organization

  • Architectures

    • Distributed architectures

      • Grid computing

    • Parallel architectures

      • Multicore architectures

    • Serial architectures

      • Superscalar architectures

  • Dependable and fault-tolerant systems and networks

• Computing methodologies

  • Modeling and simulation

    • Simulation types and techniques

      • Massively parallel and high-performance simulations

• General and reference

  • Cross-computing tools and techniques

    • Performance

• Hardware

  • Very large scale integration design

    • VLSI system specification and constraints

• Networks

  • Network performance evaluation

  • Network types

    • Packet-switching networks

• Software and its engineering

  • Software organization and properties

    • Software system structures

      • Distributed systems organizing principles

        • Grid computing