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Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path

Published: 11 March 2007 Publication History

Abstract

The speedups and the energy reductions achieved in a generic single-chip microprocessor system by employing a high-performance data-path are presented. The data-path acts as a coprocessor that accelerates computational intensive kernel sections thereby increasing the overall performance. It is composed by Flexible Computational Components that can realize any two-level sequence of primitive operations. The automated coprocessor synthesis method from high-level software description and its integration to a design flow for executing applications on the system is presented. The estimated application speedups of eight real-life applications, relative to the software execution on the microprocessor range from 1.78 to 4.00, while the overhead in circuit area is small. The energy savings have an average value of 61%. A comparison with another high-performance data-path showed that the proposed coprocessor achieves smaller area-time products, by an average of 23%, for the synthesized data-paths.

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cover image ACM Conferences
GLSVLSI '07: Proceedings of the 17th ACM Great Lakes symposium on VLSI
March 2007
626 pages
ISBN:9781595936059
DOI:10.1145/1228784
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 11 March 2007

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Author Tags

  1. coprocessor data-path
  2. design flow
  3. energy savings
  4. performance improvements
  5. synthesis

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GLSVLSI07: Great Lakes Symposium on VLSI 2007
March 11 - 13, 2007
Stresa-Lago Maggiore, Italy

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