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Hardware architecture for matrix factorization in mimo receivers

Published: 11 March 2007 Publication History

Abstract

This paper presents the hardware realization of the factorization algorithm required in a MIMO OFDM receiver to make the detection and decoding a non-orthogonal space-time code. Requirements of a real scenario represented by the standard IEEE 802.11n for WLAN have been analyzed and exploited to draw out the specifications of the proposed implementation. A very high throughput hardware realization has been obtained able to factorize 128 8x8 real channel matrices during the channel updating period of 28 μs, with a final throughput of 4,63 millions of matrices processed per second. Synthesis results on both 0.13 μm CMOS standard cell technology and FPGA compare favourably to previous implementations.

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Cited By

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  • (2012)Fast Inverse Square Root Based Matrix Inverse for MIMO-LTE SystemsProceedings of the 2012 International Conference on Control Engineering and Communication Technology10.1109/ICCECT.2012.253(321-324)Online publication date: 7-Dec-2012
  • (2011)Systolic arrays for lattice-reduction-aided mimo detectionJournal of Communications and Networks10.1109/JCN.2011.611230513:5(481-493)Online publication date: Oct-2011
  • (2009)Cholesky decomposition using fused datapath synthesisProceedings of the ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1508128.1508166(241-244)Online publication date: 24-Feb-2009
  • Show More Cited By

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    cover image ACM Conferences
    GLSVLSI '07: Proceedings of the 17th ACM Great Lakes symposium on VLSI
    March 2007
    626 pages
    ISBN:9781595936059
    DOI:10.1145/1228784
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 11 March 2007

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    Author Tags

    1. MIMO systems
    2. QR decomposition
    3. space-time codes

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    March 11 - 13, 2007
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    Cited By

    View all
    • (2012)Fast Inverse Square Root Based Matrix Inverse for MIMO-LTE SystemsProceedings of the 2012 International Conference on Control Engineering and Communication Technology10.1109/ICCECT.2012.253(321-324)Online publication date: 7-Dec-2012
    • (2011)Systolic arrays for lattice-reduction-aided mimo detectionJournal of Communications and Networks10.1109/JCN.2011.611230513:5(481-493)Online publication date: Oct-2011
    • (2009)Cholesky decomposition using fused datapath synthesisProceedings of the ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1508128.1508166(241-244)Online publication date: 24-Feb-2009
    • (2008)Design Tradeoffs and Hardware Architecture for Real-Time Iterative MIMO Detection using Sphere Decoding and LDPC CodingIEEE Journal on Selected Areas in Communications10.1109/JSAC.2008.08081626:6(1003-1014)Online publication date: 1-Aug-2008
    • (2008)MSGR-based low latency complex matrix inversion architecture2008 9th International Conference on Signal Processing10.1109/ICOSP.2008.4697158(410-413)Online publication date: Oct-2008

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