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DFM issues for 65nm and beyond

Published: 11 March 2007 Publication History

Abstract

The 90nm technology node is a mature process and is currently in full production. It was the first node to challenge the limitations of 193 nm lithography in a significant way. Many creative solutions were devised to circumvent those limitations and a lot was learned in the process. Now 65nm, 45nm, and 32nm are pushing the envelope of every aspect of the design and manufacturing flow; not just lithography but also in device engineering, device modeling, and design methodology. Design for Manufacturability (DFM) and Design for Yield (DFY) dictate that we optimize every step in the design flow. Here we address a plurality of those challenges.

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Cited By

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  • (2011)Migrating single FPGA chip multiprocessor with network on chip to 65nm and 45nm ASICICM 2011 Proceeding10.1109/ICM.2011.6177399(1-6)Online publication date: Dec-2011
  • (2010)CMOS technology, components, and layout techniquesCMOS Analog Design Using All-Region MOSFET Modeling10.1017/CBO9780511803840.004(88-133)Online publication date: 17-Dec-2010

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  1. DFM issues for 65nm and beyond

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    cover image ACM Conferences
    GLSVLSI '07: Proceedings of the 17th ACM Great Lakes symposium on VLSI
    March 2007
    626 pages
    ISBN:9781595936059
    DOI:10.1145/1228784
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 11 March 2007

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    Author Tags

    1. DFM
    2. DFY

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    March 11 - 13, 2007
    Stresa-Lago Maggiore, Italy

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    Overall Acceptance Rate 312 of 1,156 submissions, 27%

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    View all
    • (2011)Migrating single FPGA chip multiprocessor with network on chip to 65nm and 45nm ASICICM 2011 Proceeding10.1109/ICM.2011.6177399(1-6)Online publication date: Dec-2011
    • (2010)CMOS technology, components, and layout techniquesCMOS Analog Design Using All-Region MOSFET Modeling10.1017/CBO9780511803840.004(88-133)Online publication date: 17-Dec-2010

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