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Improvement of power distribution network using correlation-based regression analysis

Published: 11 March 2007 Publication History

Abstract

Stochastic approaches for effective power supply network optimization are proposed. Considering node voltages obtained using dynamic voltage drop analysis as sample variables, multi-variate regression is conducted to optimize clock timing metrics, such as clock skew or jitter. Aggregate correlation coefficient (ACC) which quantifies the resistivity between different chip regions is defined in order to find apossible insufficiency in the wire connections of the powersupply network. Based on the ACC, we also propose a procedure using linear regression to find the most effective region for improving clock timing metrics. In our example, clockskew has been reduced by 20% through two iterations.

References

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A. Chandrakasan, W. J. Bowhill, and F. Fox. Design of high-performance microprocessor circuits, chapter 12. IEEE press, 2001.
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T. Enami, M. Hashimoto, and T. Onoye. Statistical modeling technique of power-supply voltage variation by principal component analysis. IPSJ Symposium series, 2006(7):205--210, 2006. (in Japanese).
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D. Harris and S. Naffziger. Statistical clock skew modeling with data delay variations. IEEE Trans. VLSI, 9(6):888--898, Dec. 2001.
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M. Hashimoto, J. Yamaguchi, T. Sato, and H. Onodera. Timing analysis considering temporal supply voltage fluctuation. In Proc. ASP-DAC, pages 1098--1101, 2005.
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M. Hashimoto, T. Yamamoto, and H. Onodera. Statistical analysis of clock skew variation in H-tree structure. In Proc. ISQED, pages 402--407, March 2005.
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Y. Liu, S. R. Nassif, L. T. Pileggi, and A. J. Strojwas. Impact of interconnect variations on the clock skew of a gigahertz microprocessor. In Proc. DAC, pages 168--171, 2000.
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R. Saleh, S. Hussain, S. Rochel, and D. Overhauser. Clock skew verification in the presence of IR-drop in the power distribution network. IEEE trans. CAD, 19(6):635--644, June 2000.
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K. T. Tang and E. G. Friedman. Estimation of transient voltage fluctuations in the CMOS-based power distribution networks. In Proc. ISCAS, pages 463--466, 2001.

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  • (2012)Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs)Proceedings of the 2012 IEEE Computer Society Annual Symposium on VLSI10.1109/ISVLSI.2012.73(356-361)Online publication date: 19-Aug-2012

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      cover image ACM Conferences
      GLSVLSI '07: Proceedings of the 17th ACM Great Lakes symposium on VLSI
      March 2007
      626 pages
      ISBN:9781595936059
      DOI:10.1145/1228784
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 11 March 2007

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      Author Tags

      1. correlation coefficient
      2. multivariate regression
      3. power supply network
      4. voltage drop analysis

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      GLSVLSI07: Great Lakes Symposium on VLSI 2007
      March 11 - 13, 2007
      Stresa-Lago Maggiore, Italy

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      • (2012)Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs)Proceedings of the 2012 IEEE Computer Society Annual Symposium on VLSI10.1109/ISVLSI.2012.73(356-361)Online publication date: 19-Aug-2012

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