Article

Stable and compact inductance modeling of 3-D interconnect structures

Authors:

Hong Li,

Venkataramanan Balakrishnan,

Cheng-Kok KohAuthors Info & Claims

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

Pages 1 - 6

https://doi.org/10.1145/1233501.1233503

Published: 05 November 2006 Publication History

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Abstract

Recent successful techniques for the efficient simulation of largescale interconnect models rely on the sparsification of the inverse of the inductance matrix L. While there are several techniques for sparsifying L^-1, the stability of these approximations for general interconnect structures has not been established, i.e., the sparsified reluctance and inductance matrices are not guaranteed to be positive-definite. In this paper, we present a novel technique for reluctance sparsification for general interconnect structures that enjoys several advantages: First, the resulting sparse approximation is guaranteed to be positive definite. Second, the approximation is optimal, in a certain well-defined sense. Third, owing to its computational efficiency and numerical stability, the algorithm is applicable for very large problem sizes. Finally our approach yields a compact representation of both inductance and reluctance matrices for general cases.

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Cited By

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Apostolopoulou IDaloukas KEvmorfopoulos NStamoulis G(2014)Selective Inversion of Inductance Matrix for Large-Scale Sparse RLC SimulationProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593213(1-6)Online publication date: 1-Jun-2014
https://dl.acm.org/doi/10.1145/2593069.2593213
TANJI YWATANABE T(2010)Generating Stable and Sparse Reluctance/Inductance Matrix under Insufficient DiscretizationIEICE Transactions on Electronics10.1587/transele.E93.C.379E93-C:3(379-387)Online publication date: 2010
https://doi.org/10.1587/transele.E93.C.379
Tanji YWatanabe TAsai HKyung CChoi KHa S(2008)Generating stable and sparse reluctance/inductance matrix under insufficient conditionsProceedings of the 2008 Asia and South Pacific Design Automation Conference10.5555/1356802.1356847(164-169)Online publication date: 21-Jan-2008
https://dl.acm.org/doi/10.5555/1356802.1356847
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Index Terms

Stable and compact inductance modeling of 3-D interconnect structures
1. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies
2. Hardware
  1. Hardware validation
  2. Integrated circuits
    1. Interconnect
    2. Logic circuits

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Compact and stable modeling of partial inductance and reluctance matrices
ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference

The sparsification of the reluctance matrix L^-1 (where L denotes the usual inductance matrix L) has been widely used in several recent investigations to make the problem of simulation of interconnects tractable. Although these sparsification techniques ...
Shielding effect of on-chip interconnect inductance

Interconnect inductance introduces a shielding effect which decreases the effective capacitance seen by the driver of a circuit, reducing the gate delay. A model of the effective capacitance of an load driven by a CMOS inverter is presented. The ...
Generating stable and sparse reluctance/inductance matrix under insufficient conditions
ASP-DAC '08: Proceedings of the 2008 Asia and South Pacific Design Automation Conference

This paper presents generating stable and sparse reluctance/inductance matrix from the inductance matrix which is extracted under insufficient discretization. So far, to generate the sparse reluctance matrix with guaranteed stability, this matrix has to ...

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Published In

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

November 2006

147 pages

ISBN:1595933891

DOI:10.1145/1233501

General Chair:
Soha Hassoun
Tufts Univ., Medford, MA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 05 November 2006

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ICCAD06: The International Conference on Computer-Aided Design 2006

November 5 - 9, 2006

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Apostolopoulou IDaloukas KEvmorfopoulos NStamoulis G(2014)Selective Inversion of Inductance Matrix for Large-Scale Sparse RLC SimulationProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593213(1-6)Online publication date: 1-Jun-2014
https://dl.acm.org/doi/10.1145/2593069.2593213
TANJI YWATANABE T(2010)Generating Stable and Sparse Reluctance/Inductance Matrix under Insufficient DiscretizationIEICE Transactions on Electronics10.1587/transele.E93.C.379E93-C:3(379-387)Online publication date: 2010
https://doi.org/10.1587/transele.E93.C.379
Tanji YWatanabe TAsai HKyung CChoi KHa S(2008)Generating stable and sparse reluctance/inductance matrix under insufficient conditionsProceedings of the 2008 Asia and South Pacific Design Automation Conference10.5555/1356802.1356847(164-169)Online publication date: 21-Jan-2008
https://dl.acm.org/doi/10.5555/1356802.1356847
Yuichi Tanji Takayuki Watanabe Hideki Asai (2008)Generating stable and sparse reluctance/inductance matrix under insufficient conditions2008 Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2008.4483932(164-169)Online publication date: Jan-2008
https://doi.org/10.1109/ASPDAC.2008.4483932
Li HJain JKoh CBalakrishnan VGielen G(2007)A fast band-matching technique for interconnect inductance modelingProceedings of the 2007 IEEE/ACM international conference on Computer-aided design10.5555/1326073.1326190(568-571)Online publication date: 5-Nov-2007
https://dl.acm.org/doi/10.5555/1326073.1326190

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Compact and stable modeling of partial inductance and reluctance matrices

Shielding effect of on-chip interconnect inductance

Generating stable and sparse reluctance/inductance matrix under insufficient conditions

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