Article

A linear-time approach for static timing analysis covering all process corners

Authors:

Sari Onaissi,

Farid N. NajmAuthors Info & Claims

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

Pages 217 - 224

https://doi.org/10.1145/1233501.1233545

Published: 05 November 2006 Publication History

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Abstract

Manufacturing process variations lead to circuit timing variability and a corresponding timing yield loss. Traditional corner analysis consists of checking all process corners (combinations of process parameter extremes) to make sure that circuit timing constraints are met at all corners, typically by running static timing analysis (STA) at every corner. This approach is becoming too expensive due to the exponential increase in the number of corners with modern processes. As an alternative, we propose a linear-time approach for STA which covers all process corners in a single pass. Our technique assumes a linear dependence of delay on process parameters and provides tight bounds on the worst-case circuit delay. It exhibits high accuracy (within 1-3%) in practice and, if the circuit has m gates and n relevant process parameters, the complexity of the algorithm is O(mn).

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Heloue KKashyap CNajm FRoychowdhury J(2009)Quantifying robustness metrics in parameterized static timing analysisProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687438(209-216)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687438
Heloue KOnaissi SNajm FNassif SRoychowdhury J(2008)Efficient block-based parameterized timing analysis covering all potentially critical pathsProceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design10.5555/1509456.1509504(173-180)Online publication date: 10-Nov-2008
https://dl.acm.org/doi/10.5555/1509456.1509504
Sapatnekar S(2008)Variability and Statistical DesignIPSJ Transactions on System LSI Design Methodology10.2197/ipsjtsldm.1.181(18-32)Online publication date: 2008
https://doi.org/10.2197/ipsjtsldm.1.18
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A linear-time approach for static timing analysis covering all process corners
1. Hardware

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Published In

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

November 2006

147 pages

ISBN:1595933891

DOI:10.1145/1233501

General Chair:
Soha Hassoun
Tufts Univ., Medford, MA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 05 November 2006

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Sponsor:

SIGDA
IEEE-CAS
IEEE-CS

ICCAD06: The International Conference on Computer-Aided Design 2006

November 5 - 9, 2006

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

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Heloue KKashyap CNajm FRoychowdhury J(2009)Quantifying robustness metrics in parameterized static timing analysisProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687438(209-216)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687438
Heloue KOnaissi SNajm FNassif SRoychowdhury J(2008)Efficient block-based parameterized timing analysis covering all potentially critical pathsProceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design10.5555/1509456.1509504(173-180)Online publication date: 10-Nov-2008
https://dl.acm.org/doi/10.5555/1509456.1509504
Sapatnekar S(2008)Variability and Statistical DesignIPSJ Transactions on System LSI Design Methodology10.2197/ipsjtsldm.1.181(18-32)Online publication date: 2008
https://doi.org/10.2197/ipsjtsldm.1.18
Kumar SKashyap CSapatnekar SFix L(2008)A framework for block-based timing sensitivity analysisProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391647(688-693)Online publication date: 8-Jun-2008
https://dl.acm.org/doi/10.1145/1391469.1391647
Heloue KNajm FFix L(2008)Parameterized timing analysis with general delay models and arbitrary variation sourcesProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391576(403-408)Online publication date: 8-Jun-2008
https://dl.acm.org/doi/10.1145/1391469.1391576
e Silva LSilveira LPhillips JLauwereins RMadsen J(2007)Efficient computation of the worst-delay cornerProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266721(1617-1622)Online publication date: 16-Apr-2007
https://dl.acm.org/doi/10.5555/1266366.1266721

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A fast approach for static timing analysis covering all PVT corners