Article

A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects

Authors:

Massoud Momeni,

Alberto García Ortiz,

Manfred GlesnerAuthors Info & Claims

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

Pages 323 - 328

https://doi.org/10.1145/1233501.1233565

Published: 05 November 2006 Publication History

Abstract

This work introduces an extended linear pattern-dependent model for high-level signal delay estimation in high-speed very deep submicron point-to-point interconnects. The proposed model accurately predicts the delay in both inductively and capacitively coupled lines for the complete set of the switching patterns and not only for capacitively coupled lines or worst-case delay as in previous works. We also consider process variations in the formulation of the model and propose a moment-based approach for the inclusion of variations. The accuracy of the model has been assessed by means of extensive experiments. Moreover, we show how the model can be applied at high levels of abstraction in order to explore coding-based alternatives to improve throughput.

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Cited By

Murgan TBacinschi PPandey SOrtiz AGlesner M(2007)On the necessity of combining coding with spacing and shielding for improving performance and power in very deep sub-micron interconnectsProceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation10.5555/2391795.2391825(242-254)Online publication date: 3-Sep-2007
https://dl.acm.org/doi/10.5555/2391795.2391825

Index Terms

A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects
1. Hardware
  1. Hardware validation
  2. Integrated circuits
    1. Digital switches
      1. Logic families
    2. Interconnect

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cover image ACM Conferences

ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

November 2006

147 pages

ISBN:1595933891

DOI:10.1145/1233501

General Chair:
Soha Hassoun
Tufts Univ., Medford, MA

Copyright © 2006 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

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Published: 05 November 2006

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ICCAD06: The International Conference on Computer-Aided Design 2006

November 5 - 9, 2006

California, San Jose

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Cited By

Murgan TBacinschi PPandey SOrtiz AGlesner M(2007)On the necessity of combining coding with spacing and shielding for improving performance and power in very deep sub-micron interconnectsProceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation10.5555/2391795.2391825(242-254)Online publication date: 3-Sep-2007
https://dl.acm.org/doi/10.5555/2391795.2391825

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