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Voltage island aware floorplanning for power and timing optimization

Published: 05 November 2006 Publication History

Abstract

Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction. The underlying idea behind MSV is the trade-off between power saving and performance. In this paper, we present an effective voltage assignment technique based on dynamic programming. Given a netlist without reconvergent fanouts, the dynamic programming can guarantee an optimal solution for the voltage assignment. We then generate a level shifter for each net that connects two blocks in different voltage domains, and perform power-network aware floorplanning for the MSV design. Experimental results show that our floorplanner is very effective in optimizing power consumption under timing constraints.

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Cited By

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  • (2016)Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergenceIntegration, the VLSI Journal10.1016/j.vlsi.2015.09.00252:C(335-346)Online publication date: 1-Jan-2016
  • (2016)Energy efficient scheduling of real-time tasks on multi-core processors with voltage islandsFuture Generation Computer Systems10.1016/j.future.2015.06.00356:C(202-210)Online publication date: 1-Mar-2016
  • (2016)Efficient power pad assignment for multi-voltage SoC and its application in floorplanningInternational Journal of Circuit Theory and Applications10.1002/cta.217844:8(1533-1550)Online publication date: 1-Aug-2016
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cover image ACM Conferences
ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
November 2006
147 pages
ISBN:1595933891
DOI:10.1145/1233501
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 05 November 2006

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Cited By

View all
  • (2016)Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergenceIntegration, the VLSI Journal10.1016/j.vlsi.2015.09.00252:C(335-346)Online publication date: 1-Jan-2016
  • (2016)Energy efficient scheduling of real-time tasks on multi-core processors with voltage islandsFuture Generation Computer Systems10.1016/j.future.2015.06.00356:C(202-210)Online publication date: 1-Mar-2016
  • (2016)Efficient power pad assignment for multi-voltage SoC and its application in floorplanningInternational Journal of Circuit Theory and Applications10.1002/cta.217844:8(1533-1550)Online publication date: 1-Aug-2016
  • (2015)Critical path-aware voltage island partitioning and floorplanning for hard real-time embedded systemsIntegration, the VLSI Journal10.1016/j.vlsi.2014.05.00248:C(21-35)Online publication date: 1-Jan-2015
  • (2014)Row Based Dual-VDD Island Generation and PlacementProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593207(1-6)Online publication date: 1-Jun-2014
  • (2014)Level shifter planning for timing constrained multi-voltage SoC floorplanningProceedings of the 24th edition of the great lakes symposium on VLSI10.1145/2591513.2591587(329-334)Online publication date: 20-May-2014
  • (2014)Post-floorplanning power optimization for MSV-driven application specific NoC design2014 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2014.6865305(994-997)Online publication date: Jun-2014
  • (2014)Efficient nonrectangular shaped voltage island aware floorplanning with nonrandomized searching engineMicroelectronics Journal10.1016/j.mejo.2014.01.00645:4(382-393)Online publication date: Apr-2014
  • (2014)Voltage island based heterogeneous NoC design through constraint programmingComputers and Electrical Engineering10.1016/j.compeleceng.2014.08.00540:8(307-316)Online publication date: 1-Nov-2014
  • (2013)Voltage Drop Aware Power Pad Assignment and Floorplanning for Multi-voltage SoC DesignsProceedings of the 2013 International Conference on Computer-Aided Design and Computer Graphics10.1109/CADGraphics.2013.19(87-94)Online publication date: 16-Nov-2013
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