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Thermal sensor allocation and placement for reconfigurable systems

Published: 05 November 2006 Publication History

Abstract

Temperature monitoring using thermal sensors is an essential tool for evaluating the thermal behavior and sustaining the reliable operation in high-performance and high-power systems. With current technology scaling and integration trends timely and accurate detection of localized heating will be evermore important. In this work, we address the creation of a resource efficient sensor infrastructure for computing systems that are of regular nature, such as logic array-based computing platforms. We propose algorithms to embed thermal sensors into a regular structure to minimize the number of sensors and determine sensor locations required to maintain a given accuracy in temperature sensing for a given design. Our algorithms are tailored for minimal usage of thermal sensors to suit a variety of architectural conditions. For programmable logic arrays the highly application-specific usage of the hardware resources leads to unpredictable thermal profiles. As a result, post-manufacture instantiation of thermal sensors is desired, which in turn demands the use of native hardware resources, which can be scarce. We demonstrate that using our techniques the number of sensors required to monitor a set of hotspots is reduced by 75% on an average, across different sizes of logic arrays for different hotspot distributions compared to a uniform distribution of sensors throughout the fabrics.

References

[1]
Altera. Excalibur Device Overview.
[2]
Xilinx, PowerPC in Virtex-4 FX.
[3]
Lesea, A. and M. Alexander. Powering Xilinx FPGAs. 2002
[4]
Gunther, S., et al., Managing the impact of increasing microprocessor power consumption. Intel Technology Journal, February 2001.
[5]
Xilinx. Answers Database: Virtex/Virtex-E/Virtex-II/Virtex Pro/Virtex-4 - What are temperature-sensing diode pins (DXP and DXN, TDN and TDP)? 2005
[6]
Lopez-Buedo, S., J. Garrido, and E. I. Boemo, Thermal Testing on Reconfigurable Computers. IEEE Design and Test of Computers, 2000. 17(1): p. 84--91.
[7]
Lopez-Buedo, S., J. Garrido, and E. I. Boemo, Dynamically Inserting, Operating, and Eliminating Thermal Sensors of FPGA-based Systems. IEEE Transactions on Components and Packaging Technologies, 2002. 25(4): p. 561--566.
[8]
Velusamy, S., et al. Monitoring Temperature in FPGA based SoCs. in International Conference on Computer Design. 2005.
[9]
Mukherjee, R., S. Mondal, and S. O. Memik. A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. in To appear in International Conference on Engineering of Reconfigurable Systems and Algorithms. 2006.
[10]
Mondal, S., R. Mukherjee, and S. O. Memik. Fine-Grain Thermal Profiling and Sensor Insertion for FPGAs. in IEEE International Symposium on Circuits and Systems 2006.
[11]
MacQueen, J. Some Methods for Classification and Analysis of Multivariate Observations. in Fifth Berkeley Symposium on Mathematical Statistics and Probability. 1967.
[12]
Meguerdichian, S., et al. Coverage Problems in Wireless Ad-hoc Sensor Networks. in INFOCOM 2001.
[13]
Chvatal, V., A Combinatorial Theorem in Plane Geometry. Journal of Combinatorial Theory 1975. 18: p. 39--41.
[14]
Sherwani, N. A., Algorithms for VLSI Physical Design Automation. 1995, Norwell, MA: Kluwer Academic Publisher.
[15]
Lopez-Buedo, S. and E. Boemo. Making Visible the Thermal Behaviour of Embedded Microprocessors on FPGAs: a Progress Report. in International Symposium on Field Programmable Gate Arrays. 2004.
[16]
Skadron, K., et al. Temperature-Aware Microarchitecture. in International Symposium on Computer Architecture. 2003.
[17]
Yang, Y., et al. Adaptive Chip-Package Thermal Analysis for Synthesis and Design. in Conference on Design, Automation, and Test in Europe. 2006.
[18]
Yang, S. Logic Synthesis and Optimization Benchmarks. 1991: Microelectronics Center of North Carolina.
[19]
Betz, V., J. Rose, and A. Marquardt, Architecture and CAD for Deep-Submicron FPGAs. 1999: Kluwer Academic Publishers.
[20]
Poon, K. K., Power Estimation for Field Programmable Gate Arrays, in Dept. of Electrical and Computer Engg. 1999, University of British Columbia.

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  • (2017)Optimized thermal sensor allocation for field-programmable gate array temperature measurements based on self-heating testMicroelectronics Journal10.1016/j.mejo.2016.11.01360:C(55-59)Online publication date: 1-Feb-2017
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    cover image ACM Conferences
    ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
    November 2006
    147 pages
    ISBN:1595933891
    DOI:10.1145/1233501
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 05 November 2006

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    Author Tags

    1. allocation
    2. placement
    3. sensor
    4. temperature

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    • (2017)Improving the accuracy of the leakage power estimation of embedded CPUsProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130669(1233-1236)Online publication date: 27-Mar-2017
    • (2017)Performance evaluation metrics for ring-oscillator-based temperature sensors on FPGAsIntegration, the VLSI Journal10.1016/j.vlsi.2016.12.00757:C(81-100)Online publication date: 1-Mar-2017
    • (2017)Optimized thermal sensor allocation for field-programmable gate array temperature measurements based on self-heating testMicroelectronics Journal10.1016/j.mejo.2016.11.01360:C(55-59)Online publication date: 1-Feb-2017
    • (2017)Microarchitecture-Level SoC DesignHandbook of Hardware/Software Codesign10.1007/978-94-017-7358-4_28-2(1-46)Online publication date: 11-Apr-2017
    • (2017)Microarchitecture-Level SoC DesignHandbook of Hardware/Software Codesign10.1007/978-94-017-7267-9_28(867-913)Online publication date: 27-Sep-2017
    • (2015)Exploring Efficiency of Ring Oscillator-Based Temperature Sensor Networks on FPGAs (Abstract Only)Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/2684746.2689104(264-264)Online publication date: 22-Feb-2015
    • (2014)Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devicesMicroelectronics Journal10.1016/j.mejo.2014.06.00445:12(1753-1763)Online publication date: 1-Dec-2014
    • (2012)A hybrid NoC design for cache coherence optimization for chip multiprocessorsProceedings of the 49th Annual Design Automation Conference10.1145/2228360.2228511(834-842)Online publication date: 3-Jun-2012
    • (2011)Thermal and power characterization of field-programmable gate arraysProceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1950413.1950437(111-114)Online publication date: 27-Feb-2011
    • (2011)Improved Thermal Tracking for Processors Using Hard and Soft Sensor Allocation TechniquesIEEE Transactions on Computers10.1109/TC.2011.4560:6(841-851)Online publication date: 1-Jun-2011
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