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Thermal characterization and optimization in platform FPGAs

Published: 05 November 2006 Publication History

Abstract

Increasing power densities in Field Programmable Gate Arrays (FPGAs) have made them susceptible to thermal problems. The advent of platform FPGAs has further exacerbated the problems by increasing the power density variations on the FPGA fabric. Therefore, we need to characterize the die temperature of platform FPGAs. In this paper, we first estimate the temperature distribution within a Virtex-4 FPGA by feeding the block power numbers in an architecture-level temperature simulator calibrated to reflect a real FPGA package. We analyze the impact of different hard-wired blocks on the temperature profile, and observe that they introduce intra-die variation in temperature of up to 20°C. Next, we evaluate the influence of placement on temperature. Our experiments indicate a decrease in peak temperature by changing the placement of hard blocks, especially the high-speed transceivers. We further propose an iterative placement technique to reduce the peak temperature, and apply it on real designs. Finally, we propose alternate organizations of the hard blocks in the FPGA fabric to reduce temperature.

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Cited By

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  • (2014)A Framework for Supporting Adaptive Fault-Tolerant SolutionsACM Transactions on Embedded Computing Systems10.1145/262947313:5s(1-22)Online publication date: 15-Dec-2014
  • (2014)Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devicesMicroelectronics Journal10.1016/j.mejo.2014.06.00445:12(1753-1763)Online publication date: 1-Dec-2014
  • (2012)Thermal-aware logic block placement for 3D FPGAs considering lateral heat dissipation (abstract only)Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays10.1145/2145694.2145749(268-268)Online publication date: 22-Feb-2012
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        cover image ACM Conferences
        ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
        November 2006
        147 pages
        ISBN:1595933891
        DOI:10.1145/1233501
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Publication History

        Published: 05 November 2006

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        Author Tags

        1. Virtex4
        2. placement
        3. platform FPGAs
        4. temperature
        5. thermal
        6. thermal floorplan

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        View all
        • (2014)A Framework for Supporting Adaptive Fault-Tolerant SolutionsACM Transactions on Embedded Computing Systems10.1145/262947313:5s(1-22)Online publication date: 15-Dec-2014
        • (2014)Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devicesMicroelectronics Journal10.1016/j.mejo.2014.06.00445:12(1753-1763)Online publication date: 1-Dec-2014
        • (2012)Thermal-aware logic block placement for 3D FPGAs considering lateral heat dissipation (abstract only)Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays10.1145/2145694.2145749(268-268)Online publication date: 22-Feb-2012
        • (2010)On-line sensing for healthier FPGA systemsProceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1723112.1723153(239-248)Online publication date: 21-Feb-2010
        • (2009)Closed-loop modeling of power and temperature profiles of FPGAsProceedings of the ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1508128.1508207(287-287)Online publication date: 24-Feb-2009
        • (2008)Thermal-aware reliability analysis for platform FPGAsProceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design10.5555/1509456.1509613(722-727)Online publication date: 10-Nov-2008
        • (2008)Designing a 3-D FPGAIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200045616:7(882-893)Online publication date: 1-Jul-2008

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