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On the use of Bloom filters for defect maps in nanocomputing
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Source International Conference on Computer Aided Design archive
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California
SESSION: Defect tolerance for nanoscale architectures table of contents
Pages: 743 - 746  
Year of Publication: 2006
ISBN ~ ISSN:1092-3152 , 1-59593-389-1
Authors
Gang Wang  University of California, Santa Barbara, CA
Wenrui Gong  University of California, Santa Barbara, CA
Ryan Kastner  University of California, Santa Barbara, CA
Sponsors
IEEE-CS : Computer Society
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

While the exact manufacturing process for nanoscale computing devices is uncertain, it is abundantly clear that future technology nodes will see an increase in defect rates. Therefore, it is of paramount importance to construct new architectures and design methodologies that can tolerate large numbers of defects. Defect maps are a necessity in the future design flows, and research on their practical construction is essential. In this work, we study the use of Bloom filters as a data structure for defect maps. We show that Bloom filters provide the right tradeoff between accuracy and space-efficiency. In particular, they can help simplify the nanosystem design flow by embedding defect information within the nanosystem delivered by the manufacturers. We develop a novel nanoscale memory design that uses this concept. It does not rely on a voting strategy, and utilizes the device redundancy more effectively than existing approaches.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Collaborative Colleagues:
Gang Wang: colleagues
Wenrui Gong: colleagues
Ryan Kastner: colleagues