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Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's

Published: 16 April 2007 Publication History

Abstract

This paper presents a methodology for the analysis and prediction of the impact of wideband substrate noise on a LC-Voltage Controlled Oscillator (LC-VCO) from DC up to Local Frequency (LO). The impact of substrate noise is modeled a priori in a high-ohmic 0.18μm 1P6M CMOS technology and then verified on silicon on a 900MHz LC-VCO. Below a frequency of 10MHz, the impact is dominated by the on-chip resistance of the VCO ground, while above 10MHz the bond wires, parasitics of the on-chip inductor and the PCB decoupling capacitors determine the behavior of the perturbation.

References

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C. Soens, G. Van der Plas, P. Wambacq, S. Donnay, "Simulation methodology for analysis of substrate noise impact on analog/RF circuits including interconnect resistance", DATE, pp. 270--275, March 2005
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Mendez, M. A.; Mateo, D.; Aragones, X.; Gonzalez, J. L., Phase noise degradation of LC-tank VCOs due to substrate noise and package coupling, ESSCIRC, pp105--108 September 2005
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G. Brenna, D. Tschopp, J. Rogin," A 2-GHz Carrier Leakage Calibrated Direct-Conversion WCDMA Transmitter in 0.13-μm CMOS, IEEE Journal of Solid-State Circuits, pp. 1253--1261, August 2004
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DIVA, http://www.cadence.com/products/dfm/divaS. Donnay, G. Gielen, editors, Substrate noise coupling in mixed-signal ICs, Kluwer Academic Publishers, 2003.
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Cited By

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  • (2009)A methodology to predict the impact of substrate noise in analog/RF systemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203036028:11(1613-1626)Online publication date: 1-Nov-2009
  1. Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's

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      cover image ACM Conferences
      DATE '07: Proceedings of the conference on Design, automation and test in Europe
      April 2007
      1741 pages
      ISBN:9783981080124

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      EDA Consortium

      San Jose, CA, United States

      Publication History

      Published: 16 April 2007

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      DATE07
      Sponsor:
      • EDAA
      • SIGDA
      • The Russian Academy of Sciences
      DATE07: Design, Automation and Test in Europe
      April 16 - 20, 2007
      Nice, France

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      Overall Acceptance Rate 518 of 1,794 submissions, 29%

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      • (2009)A methodology to predict the impact of substrate noise in analog/RF systemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203036028:11(1613-1626)Online publication date: 1-Nov-2009

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