Constrained via minimization with practical considerations for multi-layer VLSI/PCB routing problems

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Constrained via minimization with practical considerations for multi-layer VLSI/PCB routing problems

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 28th conference on ACM/IEEE design automation table of contents

San Francisco, California, United States

Pages: 60 - 65

Year of Publication: 1991

ISBN:0-89791-395-7

Authors

Sung-Chuan Fang	Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C.
Kuo-En Chang	Department of Information and Computer Education, National Taiwan Normal University, Taipei, Taiwan, R.O.C.
Wu-Shiung Feng	Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C.
Sao-Jie Chen	Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C.

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 13, Citation Count: 4

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	T. Yoshimura and E. S. Kuh, "Efficient algorithms for channel routing," IEEE Trans. Computer-Aided Design, vol. CAD-1, no. 1, pp. 25-35, Jan. 1982.
	2	Ronald L. Rivest , Charles M. Fiduccia, A “greedy” channel router, Proceedings of the 19th conference on Design automation, p.418-424, January 1982
	3	M. Burstein and R. Pelavin, "A hierarchical channel router," IEEE Trans. Computer-Aided Design, vol. CAD-2, October 1983, 223- 234.
	4	H. W. Leong and C. L. Liu, "Discretionary channel routing," IEEproc. vol. 135, pt. G, no. 2, Apr. 1988, pp. 45-57.
	5	Y. K. Chen and M. L. Liu, 'q'hree-layer channel routing," IEEE Trans. Computer-Aided Design, vol. CAD-3, no. 2 pp. 156-163, Apr. 1984.
	6	S. E. Hambrusch, "Channel routing algorithm for overlap models," IEEE Trans. Computer-Aided Design, vol. CAD-4, no. 1, pp. 23-30, Jan. 1985.
	7	R. J. Enbody , H. C. Du, Near-optimal n-layer channel routing, Proceedings of the 23rd ACM/IEEE conference on Design automation, p.708-714, July 1986, Las Vegas, Nevada, United States
	8	D. Braun, j. Burns, F. Romeo, A. Sangiov ,amai'-Vincentelli, K. Mayaram, S. Devadas, and H. T. Ma, Techniques for multilayer channel routing," IEEE Trans. Computer-Aided Design, vol. 7, no. 6, pp. 698-712, june 1988.
	9	C.P. Hsu, "Minimum Via Topological routing," IEEE Trans. Computer-Aided Design, vol. CAD-2, no. 4, pp. 235-245, Oct. 1983.
	10	M. Marek-Sadowska, "An unconstrained topological via minimization problem for two-layer routing," IEEE Trans. Computer-Aided Design, vol. CAD-3, no. 3, pp. 184-190, July 1984.
	11	C. S. Rim, T. Kashiwabara, and IC Nakajima, "Exa,ct, algorithms for multilayer topological via minimization, IEEE Trans. Computer-Aided Design, vol. 8, no. 11, NOvember 1989.
	12	Akihiro Hashimoto , James Stevens, Wire routing by optimizing channel assignment within large apertures, Proceedings of the 8th workshop on Design automation, p.155-169, June 28-30, 1971, Atlantic City, New Jersey, United States [doi>10.1145/800158.805069]
	13	Y. Kajitani, "On via hole minimization of routing in a 2- layer board," in Proc. IEEE 1980 Int. Conf. Circuit Computers, June 1980, pp. 295-298.
	14	M. J. Ciesielski , E. Kinnen, An optimum layer assignment for routing in ICs and PCBs., Proceedings of the 18th conference on Design automation, p.733-737, June 29-July 01, 1981, Nashville, Tennessee, United States
	15	Ron Y. Pinter, Optimal layer assignment for interconnect, Advances in VLSI and Computer Systems, v.1 n.2, p.123-137, Fall 1984
	16	K. C. Chang and H. C. Du, "Efficient algorithms for layer assignment problem," IEEE Trans. Computer-Aided Design, vol. CAD- 6, no. 1, pp. 67-78, Jan. 1987.
	17	Xiao-Ming Xiong , Ernest S. Kuh, The constrained via minimization problem for PCB and VLSI design, Proceedings of the 25th ACM/IEEE conference on Design automation, p.573-578, June 12-15, 1988, Atlantic City, New Jersey, United States
	18	Y. S. Kuo , T. C. Chern , Wei-kuan Shih, Fast algorithm for optimal layer assignment, Proceedings of the 25th ACM/IEEE conference on Design automation, p.554-559, June 12-15, 1988, Atlantic City, New Jersey, United States
	19	K. C. Chang , H. C. Du, Layer Assignment Problem for Three-Layer Routing, IEEE Transactions on Computers, v.37 n.5, p.625-632, May 1988 [doi>10.1109/12.4616 ]
	20	K. E. Chang , H. F. Jyu , W. S. Feng, Constrained via minimization for three-layer routing, Computer-Aided Design, v.21 n.6, p.346-354, July/Aug. 1989 [doi>10.1016/0010-4485(89)90001-8 ]
	21	S. C. Fang, K. E. Chang, and W. S. Feng, "Via minimization with associated constraints in three-layer routing problem," in Proc. ISCAS '90, vol. II, pp. 1632-1635, May 1990.

CITED BY 4

	Prashant Saxena , C. L. Liu, A performance-driven layer assignment algorithm for multiple interconnect trees, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.124-127, November 08-12, 1998, San Jose, California, United States
	Rung-Bin Lin , Shu-Yu Chen, Conjugate conflict continuation graphs for multi-layer constrained via minimization, Information Sciences: an International Journal, v.177 n.12, p.2436-2447, June, 2007
	Yih-Chih Chou , Youn-Long Lin, A graph-partitioning-based approach for multi-layer constrained via minimization, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.426-429, November 08-12, 1998, San Jose, California, United States
	Chin-Chih Chang , Jason Cong, An efficient approach to multi-layer layer assignment with application to via minimization, Proceedings of the 34th annual conference on Design automation, p.600-603, June 09-13, 1997, Anaheim, California, United States