Cited By
View all- Fatemi HKahng AKim Mde Gyvez JKahng A(2020)Optimal bounded-skew steiner trees to minimize maximum k-active dynamic powerProceedings of the Workshop on System-Level Interconnect: Problems and Pathfinding Workshop10.1145/3414622.3431908(1-8)Online publication date: 5-Nov-2020
- Chandrakar KRoy S(2018)A SAT-Based Methodology for Effective Clock Gating for Power MinimizationJournal of Circuits, Systems and Computers10.1142/S021812661950011728:01(1950011)Online publication date: 15-Oct-2018
- Lu TSrivastava A(2017)Low-Power Clock Tree Synthesis for 3D-ICsACM Transactions on Design Automation of Electronic Systems10.1145/301961022:3(1-24)Online publication date: 5-Apr-2017
- Show More Cited By