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Stimulus generation for constrained random simulation

Published: 05 November 2007 Publication History

Abstract

Constrained random simulation is the main workhorse in today's hardware verification flows. It requires the random generation of input stimuli that obey a set of declaratively specified input constraints, which are then applied to validate given design properties by simulation. The efficiency of the overall flow depends critically on (1) the performance of the constraint solver and (2) the distribution of the generated solutions. In this paper we discuss the overall problem of efficient constraint solving for stimulus generation for mixed Boolean/integer variable domains and propose a new hybrid solver based on Markov-chain Monte Carlo methods with good performance and distribution.

References

[1]
T. Grötker, S. Liao, G. Martin, and S. Swan, System Design with SystemC. Boston: Kluwer Academic, 2002.
[2]
S. Sutherland, S. Davidmann, and P. Flake, SystemVerilog for Design: A guide to using SystemVerilog for hardware design and modeling. Norwell, MA, USA: Kluwer Academic, 2003.
[3]
S. Iman and S. Joshi, The e Hardware Verification Language. Norwell, MA, USA: Kluwer Academic, 2004.
[4]
J. Yuan, K. Shultz, C. Pixley, H. Miller, and A. Aziz, "Modeling design constraints and biasing in simulation using BDDs," in Digest Tech. Papers IEEE/ACM Int'l Conf. Computer-Aided Design, pp. 584--589, Nov. 1999.
[5]
J. Yuan, A. Aziz, C. Pixley, and K. Albin, "Simplifying Boolean constraint solving for random simulation-vector generation," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 23, pp. 412--420, Mar. 2004.
[6]
J. H. Kukula and T. R. Shiple, "Building circuits from relations," in Proc. 12th Int'l Conf. Computer-Aided Verif. (CAV), pp. 113--123, Springer-Verlag, 2000.
[7]
M. A. Iyer, "RACE: A word-level ATPG-based constraints solver system for smart random simulation," in IEEE International Test Conference (ITC), (Charlotte, NC, United States), pp. 299--308, Sept. 2003.
[8]
M. Davis and H. Putnam, "A computing procedure for quantification theory," J. ACM, vol. 7, pp. 201--215, 1960.
[9]
M. Davis, G. Logemann, and D. Loveland, "A machine program for theorem proving," Comms. ACM, vol. 5, pp. 394--397, July 1962.
[10]
M. W. Moskewicz, C. F. Madigan, Y. Zhao, L. Zhang, and S. Malik, "Chaff: Engineering an efficient SAT solver," in Proc. 38th ACM/IEEE Design Automation Conf., pp. 530--535, June 2001.
[11]
W. Wei, J. Erenrich, and B. Selman, "Towards efficient sampling: Exploiting random walk strategies," in Proc. Nat'l Conf. Artificial Intelligence, pp. 670--676, Jul. 2004.
[12]
N. Metropolis, A. W. Rosenbluth, M. N. Rosenbluth, A. H. Teller, and E. Teller, "Equations of state calculations by fast computing machines," J. Chem. Phys., vol. 21, pp. 1087--1092, June 1953.
[13]
B. Selman, H. A. Kautz, and B. Cohen, "Local search strategies for satisfiability testing," in Proc. 2nd DIMACS Challenge on Cliques, Coloring, and Satisfiability (M. Trick and D. S. Johnson, eds.), (Providence RI), 1993.
[14]
R. Dechter, K. Kask, E. Bin, and R. Emek, "Generating random solutions for constraint satisfaction problems," in 18th Nat'l Conf. Artificial Intelligence (AAAI02), pp. 15--21, July 2002.
[15]
V. Gogate and R. Dechter, "A new algorithm for sampling CSP solutions uniformly at random," tech. rep., School of Information and Computer Science, University of California, Irvine, May 2006.
[16]
A. Chandra, V. Iyengar, D. Jameson, R. Jawalekar, I. Nair, B. Rosen, M. Mullen, J. Yoon, R. Armoni, D. Geist, and Y. Wolfsthal, "AVPGEN--- a test generator for architectural verification," IEEE Trans. Very Large Scale Integration, vol. 3, no. 2, pp. 188--200, 1995.
[17]
K. Shimizu and D. L. Dill, "Deriving a simulation input generator and a coverage metric from a formal specification," in Proc. 39th Design Automation Conf., (New Orleans, LA, United States), pp. 801--806, Jun 2002.
[18]
W. K. Hastings, "Monte Carlo sampling methods using Markov chains and their applications," Biometrika, vol. 57, pp. 97--109, 1970.
[19]
S. Geman and D. Geman, "Stochastic relaxation, Gibbs distributions, and the Bayesian restoration of images," IEEE Trans. Pattern Analysis and Machine Intelligence, vol. 6, pp. 721--741, Nov. 1984.
[20]
A. E. Gelfand and A. F. M. Smith, "Sampling-based approaches to calculating marginal densities," J. Amer. Statist. Assoc., vol. 85, no. 410, pp. 398--409, 1990.
[21]
P.-H. Ho, T. Shiple, K. Harer, J. Kukula, R. Damiano, V. Bertacco, J. Taylor, and J. Long, "Smart simulation using collaborative formal and simulation engines," in Digest Tech. Papers IEEE/ACM Int'l Conf. Computer-Aided Design, pp. 120--126, Nov. 2000.
[22]
S. Shyam and V. Bertacco, "Distance-guided hybrid verification with GUIDO," in Design Automation and Test in Europe, Mar. 2006.
[23]
R. E. Bryant, "Graph-based algorithms for Boolean function manipulation," IEEE Trans. Computers, vol. 35, pp. 677--691, Aug. 1986.
[24]
"Property specification language, reference manual, version 1.1," Accellera Organization, June 2004.
[25]
Z. Xiu, D. A. Papa, P. Chong, C. Albrecht, A. Kuehlmann, R. A. Rutenbar, and I. L. Markov, "Early research experience with OpenAccess Gear: An open source development environment for physical design," in Proc. ACM Int'l Symp. Phys. Design (ISPD), pp. 94--100, Apr. 2005.
[26]
F. Somenzi, CUDD: CU Decision Diagram Package, Release 2.4.0. University of Colorado at Boulder, 2005.
[27]
N. Eén and N. Sörensson, "An extensible SAT-solver," in Proc. 6th Int'l Conf. Theory & Appl. Satisfiability Testing (SAT), pp. 502--518, May 2003.

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cover image ACM Conferences
ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
November 2007
933 pages
ISBN:1424413826
  • General Chair:
  • Georges Gielen

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IEEE Press

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Published: 05 November 2007

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ICCAD '07 Paper Acceptance Rate 139 of 510 submissions, 27%;
Overall Acceptance Rate 457 of 1,762 submissions, 26%

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  • (2021)Sampling of shape expressions with ShapExProceedings of the 19th ACM-IEEE International Conference on Formal Methods and Models for System Design10.1145/3487212.3487350(118-125)Online publication date: 20-Nov-2021
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