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Selective shielding: a crosstalk-free bus encoding technique

Published: 05 November 2007 Publication History

Abstract

With CMOS process technology scaling to deep submicron level, propagation delay across long on-chip buses is becoming one of the main performance limiting factors in high-performance designs. Propagation delay is very significant when adjacent wires are transitioning in opposite direction (i.e., crosstalk transitions) as compared to transitioning in the same direction. As crosstalk transitions have significant impact on propagation delay, several bus encoding techniques have been proposed in literature to eliminate such transitions.
In this work, we propose a technique, namely, selective shielding, to eliminate crosstalk transitions. Compared to the conventional shielding technique, our technique significantly reduces the number of extra wires. We give a lower bound on the number of wires required to encode n-bit data using the selective shielding technique. We show that our technique achieves better energy savings and requires less area as compared to the other techniques.

References

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F. Caignet, et. al. "The challenge of signal integrity in deep-submicrometer CMOS technology". IEEE, 89(4), 2001, pp. 556--573.
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C. Duan, et. al. "Analysis and avoidance of crosstalk in on-chip buses". Hot Interconnects, 2001, pp. 133--138.
[3]
J. Ma and L. He. "Formulae and applications of interconnect estimation considering shield insertion and net ordering". ICCAD, 2001.
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P. Sotiriadis and A. Chandrakasan. "Low Power Bus Coding Techniques Considering Inter-wire Capacitances". In CICC, 2000, pp. 507--510.
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P. Sotiriadis and A. Chandrakasan. "Reducing bus delay in sub-micron technology using coding". ASPDAC, 2001, pp. 109--114.
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P. Sotiriadis and A. Chandrakasan. "A Bus Energy Model for Deep Submicron Technology". TVLSI, 10(3), 2002, pp. 341--350.
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S. R. Sridhara, et. al. "Area and energy-efficient crosstalk avoidance codes for on-chip buses". ICCD, 2004, pp. 12--17.
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M. R. Stan and W. P. Burleson. "Limited-weight codes for low power I/O". IEEE/ACM International Workshop on Low Power Design, 1994.
[9]
P. Subramanya, et. al. "A bus encoding technique for power and cross-talk minimization". VLSID, 2004, pp. 443--448.
[10]
D. Sylvester and C. Hu. "Analytical modeling and characterization of deep-submicrometer interconnect". IEEE, 89(5), 2001, pp. 634--664.
[11]
B. Victor and K. Keutzer. "Bus encoding to prevent crosstalk delay". ICCAD, 2001, pp. 57--63.
[12]
J. Yim and C. Kung. "Reducing cross-coupling among interconnect wires in deep-submicron datapath design". DAC, 1999, pp. 485--490.

Cited By

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  • (2010)Scalable codeword generation for coupled busesProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871102(729-734)Online publication date: 8-Mar-2010
  • (2009)Selective shielding technique to eliminate crosstalk transitionsACM Transactions on Design Automation of Electronic Systems10.1145/1529255.152926514:3(1-20)Online publication date: 4-Jun-2009
  • (2009)Delay-efficient bus encoding techniquesMicroprocessors & Microsystems10.1016/j.micpro.2009.05.00333:5-6(365-373)Online publication date: 1-Aug-2009
  1. Selective shielding: a crosstalk-free bus encoding technique

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      cover image ACM Conferences
      ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
      November 2007
      933 pages
      ISBN:1424413826
      • General Chair:
      • Georges Gielen

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      IEEE Press

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      Published: 05 November 2007

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      ICCAD '07 Paper Acceptance Rate 139 of 510 submissions, 27%;
      Overall Acceptance Rate 457 of 1,762 submissions, 26%

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      View all
      • (2010)Scalable codeword generation for coupled busesProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871102(729-734)Online publication date: 8-Mar-2010
      • (2009)Selective shielding technique to eliminate crosstalk transitionsACM Transactions on Design Automation of Electronic Systems10.1145/1529255.152926514:3(1-20)Online publication date: 4-Jun-2009
      • (2009)Delay-efficient bus encoding techniquesMicroprocessors & Microsystems10.1016/j.micpro.2009.05.00333:5-6(365-373)Online publication date: 1-Aug-2009

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