Cited By
View all- Zhang WJha NShang L(2010)Low-power 3D nano/CMOS hybrid dynamically reconfigurable architectureACM Journal on Emerging Technologies in Computing Systems10.1145/1777401.17774036:3(1-32)Online publication date: 13-Aug-2010
Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture
Pages 758 - 764
Abstract
In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The proposed architecture is based on CMOS-nano hybrid techniques that incorporate nanomaterials such as carbon nanotube bundles and nanowire crossbars into CMOS fabrication process. Using unique features of FPGAs and a novel 3D stacking method enabled by the application of nanomaterials, 3D nFPGA obtains a 4.5X footprint reduction compared to traditional CMOS-based 2D FPGAs. With a customized design automation flow, we evaluate the performance and power of 3D nFPGA driven by the 20 largest MCNC benchmarks. Results demonstrate that 3D nFPGA is able to provide a performance gain of 2.6X with a small power overhead comparing to the CMOS 2D FPGA architecture.
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- Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture
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- IEEE CASS/CANDE
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Published: 05 November 2007
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ICCAD07: The International Conference on Computer-Aided Design 2007
November 5 - 8, 2007
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View all- Zhang WJha NShang L(2010)Low-power 3D nano/CMOS hybrid dynamically reconfigurable architectureACM Journal on Emerging Technologies in Computing Systems10.1145/1777401.17774036:3(1-32)Online publication date: 13-Aug-2010
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