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An open-source binary utility generator

Published: 23 April 2008 Publication History

Abstract

Electronic system level (ESL) modeling allows early hardware-dependent software (HDS) development. Due to broad CPU diversity and shrinking time-to-market, HDS development can neither rely on hand-retargeting binary tools, nor can it rely on pre-existent tools within standard packages. As a consequence, binary utilities which can be easily adapted to new CPU targets are of increasing interest. We present in this article a framework for automatic generation of binary utilities. It relies on two innovative ideas: platform-aware modeling and more inclusive relocation handling. Generated assemblers, linkers, disassemblers and debuggers were validated for MIPS, SPARC, PowerPC, i8051 and PIC16F84. An open-source prototype generator is available for download.

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  • (2015)Architecture description language based retargetable symbolic executionProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2755805(241-246)Online publication date: 9-Mar-2015
  • (2012)ACCGenProceedings of the 2012 IEEE 24th International Symposium on Computer Architecture and High Performance Computing10.1109/SBAC-PAD.2012.33(278-285)Online publication date: 24-Oct-2012
  • (2010)Software Development Tool Generation Method Suitable for Instruction Set Extension of Embedded ProcessorsIPSJ Transactions on System LSI Design Methodology10.2197/ipsjtsldm.3.2073(207-221)Online publication date: 2010

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cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 13, Issue 2
April 2008
272 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/1344418
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 23 April 2008
Accepted: 01 October 2007
Received: 01 March 2007
Published in TODAES Volume 13, Issue 2

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Author Tags

  1. Platform debugging
  2. TLM
  3. retargetable tools

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View all
  • (2015)Architecture description language based retargetable symbolic executionProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2755805(241-246)Online publication date: 9-Mar-2015
  • (2012)ACCGenProceedings of the 2012 IEEE 24th International Symposium on Computer Architecture and High Performance Computing10.1109/SBAC-PAD.2012.33(278-285)Online publication date: 24-Oct-2012
  • (2010)Software Development Tool Generation Method Suitable for Instruction Set Extension of Embedded ProcessorsIPSJ Transactions on System LSI Design Methodology10.2197/ipsjtsldm.3.2073(207-221)Online publication date: 2010

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