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The optimization of kEP-SOPs: Computational complexity, approximability and experiments
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ACM Transactions on Design Automation of Electronic Systems (TODAES) archive
Volume 13 ,  Issue 2  (April 2008) table of contents
Article No. 35  
Year of Publication: 2008
ISSN:1084-4309
Authors
Anna Bernasconi  University of Pisa, Pisa, Italy
Valentina Ciriani  University of Milano, Crema (CR), Italy
Roberto Cordone  University of Milano, Crema (CR), Italy
Publisher
ACM  New York, NY, USA
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ABSTRACT

We propose a new algebraic four-level expression called k-EXOR-projected sum of products (kEP-SOP). The optimization of a kEP-SOP is NPNP-hard, but can be approximated within a fixed performance guarantee in polynomial time. Moreover, fully testable circuits under the stuck-at-fault model can be derived from kEP-SOPs by adding at most a constant number of multiplexer gates. The experiments show that the computational time is very short and the results are most of the time optimal with respect to the number of products involved. kEP-SOPs also prove experimentally a good starting point for general multilevel logic synthesis.


REFERENCES

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Collaborative Colleagues:
Anna Bernasconi: colleagues
Valentina Ciriani: colleagues
Roberto Cordone: colleagues