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The ISPD global routing benchmark suite

Published: 13 April 2008 Publication History

Abstract

This paper describes the ISPD global routing benchmark suite and related contests. Total 16 global routing benchmarks are produced from the ISPD placement contest benchmark suite using a variety of publicly available academic placement tools. The representative characteristics of the ISPD global routing benchmark suite include multiple metal layers with layer assignment requirement, wire and via width/space modeling, and macro porosity modeling. The benchmarks have routable nets from 200 thousand 1.6 million. While primarily intended for global routing, they can be certainly extended for detailed routing or routing congestion estimation. In conjunction with the previous ISPD placement contest benchmark suite, the new global routing benchmarks will present realistic and challenging physical design problems of modern complex IC designs

References

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Cited By

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  • (2024)NEATRouter: A New Method for 2D Global Routing2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC62099.2024.10767823(1-6)Online publication date: 6-Oct-2024
  • (2024)A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm OptimizationIEEE Transactions on Systems, Man, and Cybernetics: Systems10.1109/TSMC.2024.340796054:9(5627-5640)Online publication date: Sep-2024
  • (2024)Machine learning optimal ordering in global routing problems in semiconductorsScientific Reports10.1038/s41598-024-82226-914:1Online publication date: 28-Dec-2024
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Reviews

Wolfgang Schreiner

In the physical design of integrated circuits, routing is the process of creating physical signal connections from logical connectivity requirements under various design constraints. Based on a previously constructed placement of the circuit elements, and on a graph that describes the fundamental communication structures and capacities, global routing is applied to solve the problem on a high level, with details of refinements, adjustments, and corrections left to later design phases. Regular contests based on widely accepted benchmark suites will help advance the state of the art in global routing. Thus, the International Symposium on Physical Design (ISPD) has developed a Global Routing Benchmark Suite that is described in this short paper. Based on previously constructed placement benchmarks, eight global routing benchmarks were developed for a contest at ISPD 2007; these were extended by another eight benchmarks for the ISPD 2008 contest. The suites were carefully chosen to comprise benchmarks with different characteristics with respect to, for example, the number and nets to be routed, the structure of the global graph, and the capacities of the edges, thus yielding a number of representative problem instances. The paper offers a clear overview of the design rationale of the benchmarks, and also discusses the problem of choosing a metric for comparing the quality of solutions; essentially, both contests emphasized congestion reduction, with the number of overflows as the primary objective function. Together with the ISPD placement benchmark, the global routing benchmark is certainly going to foster future research in physical design. Online Computing Reviews Service

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cover image ACM Conferences
ISPD '08: Proceedings of the 2008 international symposium on Physical design
April 2008
218 pages
ISBN:9781605580487
DOI:10.1145/1353629
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 13 April 2008

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Author Tags

  1. VLSI routing
  2. benchmarks
  3. physical design

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  • Research-article

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ISPD '08
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ISPD '08: International Symposium on Physical Design
April 13 - 16, 2008
Oregon, Portland, USA

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Overall Acceptance Rate 62 of 172 submissions, 36%

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ISPD '25
International Symposium on Physical Design
March 16 - 19, 2025
Austin , TX , USA

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Cited By

View all
  • (2024)NEATRouter: A New Method for 2D Global Routing2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC62099.2024.10767823(1-6)Online publication date: 6-Oct-2024
  • (2024)A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm OptimizationIEEE Transactions on Systems, Man, and Cybernetics: Systems10.1109/TSMC.2024.340796054:9(5627-5640)Online publication date: Sep-2024
  • (2024)Machine learning optimal ordering in global routing problems in semiconductorsScientific Reports10.1038/s41598-024-82226-914:1Online publication date: 28-Dec-2024
  • (2022)TritonRoute-WXL: The Open-Source Router With Integrated DRC EngineIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.307926841:4(1076-1089)Online publication date: Apr-2022
  • (2022)Global RoutingVLSI Physical Design: From Graph Partitioning to Timing Closure10.1007/978-3-030-96415-3_5(131-169)Online publication date: 15-Jun-2022
  • (2021)BeGAN: Power Grid Benchmark Generation Using a Process-portable GAN-based Methodology2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)10.1109/ICCAD51958.2021.9643566(1-8)Online publication date: 1-Nov-2021
  • (2018)TILA-S: Timing-Driven Incremental Layer Assignment Avoiding Slew ViolationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.265222137:1(231-244)Online publication date: Jan-2018
  • (2017)Incremental Layer Assignment for Timing OptimizationACM Transactions on Design Automation of Electronic Systems10.1145/308372722:4(1-25)Online publication date: 13-Jun-2017
  • (2016)Incremental layer assignment for critical path timingProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898033(1-6)Online publication date: 5-Jun-2016
  • (2016)Scaling Up Physical DesignProceedings of the 2016 on International Symposium on Physical Design10.1145/2872334.2872342(131-137)Online publication date: 3-Apr-2016
  • Show More Cited By

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