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A genetic algorithms approach to modeling the performance of memory-bound computations
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Conference on High Performance Networking and Computing archive
Proceedings of the 2007 ACM/IEEE conference on Supercomputing table of contents
Reno, Nevada
SESSION: Modeling in action table of contents
Article No. 47  
Year of Publication: 2007
ISBN:978-1-59593-764-3
Authors
Mustafa M Tikir  San Diego Supercomputer Center, La Jolla, CA
Laura Carrington  San Diego Supercomputer Center, La Jolla, CA
Erich Strohmaier  Lawrence Berkeley National Laboratory, One Cyclotron Road, CA
Allan Snavely  San Diego Supercomputer Center, La Jolla, CA
Sponsors
IEEE-CS\DATC : IEEE Computer Society
ACM: Association for Computing Machinery
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ACM  New York, NY, USA
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ABSTRACT

Benchmarks that measure memory bandwidth, such as STREAM, Apex-MAPS and MultiMAPS, are increasingly popular due to the "Von Neumann" bottleneck of modern processors which causes many calculations to be memory-bound. We present a scheme for predicting the performance of HPC applications based on the results of such benchmarks. A Genetic Algorithm approach is used to "learn" bandwidth as a function of cache hit rates per machine with MultiMAPS as the fitness test. The specific results are 56 individual performance predictions including 3 full-scale parallel applications run on 5 different modern HPC architectures, with various CPU counts and inputs, predicted within 10% average difference with respect to independently verified runtimes.


REFERENCES

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Collaborative Colleagues:
Mustafa M Tikir: colleagues
Laura Carrington: colleagues
Erich Strohmaier: colleagues
Allan Snavely: colleagues