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A retargetable parallel-programming framework for MPSoC

Published: 25 July 2008 Publication History

Abstract

As more processing elements are integrated in a single chip, embedded software design becomes more challenging: It becomes a parallel programming for nontrivial heterogeneous multiprocessors with diverse communication architectures, and design constraints such as hardware cost, power, and timeliness. In the current practice of parallel programming with MPI or OpenMP, the programmer should manually optimize the parallel code for each target architecture and for the design constraints. Thus, the design-space exploration of MPSoC (multiprocessor systems-on-chip) costs become prohibitively large as software development overhead increases drastically. To solve this problem, we develop a parallel-programming framework based on a novel programming model called common intermediate code (CIC). In a CIC, functional parallelism and data parallelism of application tasks are specified independently of the target architecture and design constraints. Then, the CIC translator translates the CIC into the final parallel code, considering the target architecture and design constraints to make the CIC retargetable. Experiments with preliminary examples, including the H.263 decoder, show that the proposed parallel-programming framework increases the design productivity of MPSoC software significantly.

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 13, Issue 3
July 2008
370 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/1367045
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 25 July 2008
Accepted: 01 March 2008
Revised: 01 February 2008
Received: 01 August 2007
Published in TODAES Volume 13, Issue 3

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Author Tags

  1. Embedded software
  2. design-space exploration
  3. multiprocessor system on chip
  4. parallel-programming
  5. software generation

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  • (2020)Pricing Multi-Unit MarketsACM Transactions on Economics and Computation10.1145/33737157:4(1-29)Online publication date: 30-Jan-2020
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