Cited By
View all- Witharana HJayasena AMishra P(2024)Incremental Concolic Testing of Register-Transfer Level DesignsACM Transactions on Design Automation of Electronic Systems10.1145/365562129:3(1-23)Online publication date: 3-May-2024
- Jayasena AMishra P(2023)Directed Test Generation for Hardware Validation: A SurveyACM Computing Surveys10.1145/363804656:5(1-36)Online publication date: 19-Dec-2023
- Srinivasan SVemuri R(2023)Mutation Analysis and Model Checking Guided Test Generation for SoC Run-Time Monitors2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID)10.1109/VLSID57277.2023.00057(240-245)Online publication date: Jan-2023
- Show More Cited By