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Reconfigurable analogue hardware evolution of adaptive spiking neural network controllers

Published: 12 July 2008 Publication History

Abstract

This paper details the hardware evolution of adaptive Spiking Neural Network (SNN) controllers, implemented on a network of cascaded Field Programmable Analogue Arrays (FPAAs). The fixed architecture, feed forward SNNs are trained using a Genetic Algorithm (GA). An obstacle avoidance simulated robotics controller application is chosen to test the FPAA reconfigurable hardware evolution platform. Evolved behaviours, resulting from FPAA-based SNN controllers, are compared with those obtained using software-based SNN implementations. Results presented indicate the emergence of effective behaviours and adaptation to environmental change.

References

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Anadigm Field Programmable Analog Arrays. www.anadigm.com.
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W. Gerstner and W.M. Kistler. Spiking neuron models. 2002.
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J. Hereford and C. Pruitt. Robust sensor systems using evolvable hardware. Evolvable Hardware, 2004. Proceedings. 2004 NASA/DoD Conference on, pages 161--168, 2004.
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J. Maher, B. Mc Ginley, P. Rocke, and F. Morgan. Intrinsic Hardware Evolution of Neural Networks in Reconfigurable Analogue and Digital Devices. Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06)-Volume 00, pages 321--322, 2006.
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S. Nolfi, D. Floreano, O. Miglino, and F. Mondada. How to evolve autonomous robots: Different approaches in evolutionary robotics. Artificial Life IV, pages 190--197, 1994.
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J. Plante, H. Shaw, L. Mickens, and C. Johnson-Bey. Overview of field programmable analog arrays as enabling technology for evolvable hardware for high reliability systems. Evolvable Hardware, 2003. Proceedings. NASA/DoD Conference on, pages 77--78, 2003.
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P. Rocke, J. Maher, and F. Morgan. Platform for Intrinsic Evolution of Analogue Neural Networks. Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) on Reconfigurable Computing and FPGAs, 2005.
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M.A. Terry, J. Marcus, M. Farrell, V. Aggarwal, and U.M. O'Reilly. GRACE: Generative Robust Analog Circuit Exploration. 9th European Conference on Genetic Programming, EVO-Workshops, EVOHOT track, 2006.

Cited By

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  • (2022)A Survey on Neuromorphic Computing: Models and HardwareIEEE Circuits and Systems Magazine10.1109/MCAS.2022.316633122:2(6-35)Online publication date: Oct-2023
  • (2020)Simulating and deploying analog arithmetic circuits on FPAASProceedings of the 2020 Summer Simulation Conference10.5555/3427510.3427530(1-12)Online publication date: 20-Jul-2020
  • (2015)Study on Artificial Neuron Embedded into the Dynamically Programmable Analogue Signal ProcessorIFAC-PapersOnLine10.1016/j.ifacol.2015.07.07748:4(454-459)Online publication date: 2015
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      cover image ACM Conferences
      GECCO '08: Proceedings of the 10th annual conference on Genetic and evolutionary computation
      July 2008
      1814 pages
      ISBN:9781605581309
      DOI:10.1145/1389095
      • Conference Chair:
      • Conor Ryan,
      • Editor:
      • Maarten Keijzer
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 12 July 2008

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      Author Tags

      1. FPAA hardware evolution
      2. analogue neural networks.
      3. spiking neural networks

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      Overall Acceptance Rate 1,669 of 4,410 submissions, 38%

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      View all
      • (2022)A Survey on Neuromorphic Computing: Models and HardwareIEEE Circuits and Systems Magazine10.1109/MCAS.2022.316633122:2(6-35)Online publication date: Oct-2023
      • (2020)Simulating and deploying analog arithmetic circuits on FPAASProceedings of the 2020 Summer Simulation Conference10.5555/3427510.3427530(1-12)Online publication date: 20-Jul-2020
      • (2015)Study on Artificial Neuron Embedded into the Dynamically Programmable Analogue Signal ProcessorIFAC-PapersOnLine10.1016/j.ifacol.2015.07.07748:4(454-459)Online publication date: 2015
      • (2009)Exploring the evolution of NoC-based Spiking Neural Networks on FPGAs2009 International Conference on Field-Programmable Technology10.1109/FPT.2009.5377663(300-303)Online publication date: Dec-2009

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