research-article

Programmable logic circuits based on ambipolar CNFET

Authors:

M. Haykel Ben Jamaa,

David Atienza,

Yusuf Leblebici,

Giovanni De MicheliAuthors Info & Claims

DAC '08: Proceedings of the 45th annual Design Automation Conference

Pages 339 - 340

https://doi.org/10.1145/1391469.1391556

Published: 08 June 2008 Publication History

Get Access

Abstract

Recently, it was demonstrated that the polarity of carbon nanotube field effect transistors can be electrically controlled. In this paper we show how Programmable Logic Arrays (PLA) can be built out of these devices, and we illustrate how they outperform usual PLA by internal signal inversion. The simulations show an area saving up to ~ 21% and decrease of the delay in PLA-based FPGA by 50%. We also show that this architecture is suitable for high-performance design tools and defect-tolerance approaches.

References

[1]

R. K. Brayton et al. Whirlpool PLAs: A Regular Logic Structure and their Synthesis. ICCAD, 00:543--550, 2002.

Digital Library

Google Scholar

[2]

A. Javey et al. Self-Aligned Ballistic Molecular Transistors and Electrically Parallel Nanotube Arrays. Nano Letters, 4(7):1319--1322, 2004.

Crossref

Google Scholar

[3]

Y.-M. Lin et al. Novel Carbon Nanotube FET Design with Tunable Polarity. In IEDM, 687--690, 2004.

Google Scholar

[4]

J. Liu et al. Novel CNTFET-Based Reconfigurable Logic Gate Design. In DAC, 276--277, 2007.

Digital Library

Google Scholar

[5]

N. Patil et al. Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits. In DAC, 958--961, 2007.

Digital Library

Google Scholar

[6]

A. Schmid et al. Fault-Tolerant PLA-Style Circuit Design for Failure-Prone Nanometer CMOS and Quantum Device Technologies. Neural Networks, 3:1965--1969, 2004.

Google Scholar

[7]

Sasao T. Input Variable Assignment and Output Phase Optimization of PLA's. Trans. Comp., 33(10):879--894, 1984.

Digital Library

Google Scholar

[8]

Saeyang Yang. Logic Synthesis and Optimization Benchmarks User Guide Version 3.0. Technical report, Microelectronics Center of North Carolina, 2001.

Google Scholar

Cited By

View all

Basnat SAkram MNizamuddin M(2023)Implementation of Ambipolar CNTFET based logic gates and their performance comparison with CNTFET and CMOS based logic gates2023 International Conference on Recent Advances in Electrical, Electronics & Digital Healthcare Technologies (REEDCON)10.1109/REEDCON57544.2023.10150505(56-61)Online publication date: 1-May-2023
https://doi.org/10.1109/REEDCON57544.2023.10150505
Reena Monica P(2022)Seven Strategies to Suppress the Ambipolar Behaviour in CNTFETs: a ReviewSilicon10.1007/s12633-022-01813-514:16(10199-10216)Online publication date: 26-Mar-2022
https://doi.org/10.1007/s12633-022-01813-5
Ponnayan RThazhathu S(2020)One instruction set computer with optimised polarity‐tunable model of double gate CNTFETsIET Circuits, Devices & Systems10.1049/iet-cds.2019.014314:6(770-779)Online publication date: 31-Aug-2020
https://doi.org/10.1049/iet-cds.2019.0143
Show More Cited By

Index Terms

Programmable logic circuits based on ambipolar CNFET
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Combinational circuits
  2. Very large scale integration design
    1. Application-specific VLSI designs

Recommendations

System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits

The quest for technologies with superior device characteristics has showcased Carbon-Nanotube Field-Effect Transistors (CNFET) into limelight. In this work we present physical design techniques to improve the yield of CNFET circuits in the presence of ...
Device Model for Ballistic CNFETs Using the First Conducting Band

This article presents an approximate model for the drain-source current of a carbon nanotube FET (CNFET) in the ballistic regime by using the first conducting band. The proposed model is symbolic in terms of carbon nanotube (CNT) features and presents a ...
Carbon nanotube circuits: opportunities and challenges
DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe

Carbon Nanotube Field-Effect Transistors (CNFETs) are excellent candidates for building highly energy-efficient digital systems. However, imperfections inherent in carbon nanotubes (CNTs) pose significant hurdles to realizing practical CNFET circuits. ...

Comments

Information & Contributors

Information

Published In

DAC '08: Proceedings of the 45th annual Design Automation Conference

June 2008

993 pages

ISBN:9781605581156

DOI:10.1145/1391469

General Chair:
Limor Fix
Intel Research Pittsburgh, Pittsburgh, PA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 08 June 2008

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Funding Sources

Schweizerische Nationalfonds zur Förderung der Wissenschaftlichen Forschung
Spanish Government Research

Conference

DAC '08

Sponsor:

SIGDA

DAC '08: The 45th Annual Design Automation Conference 2008

June 8 - 13, 2008

California, Anaheim

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

21
Total Citations
View Citations
254
Total Downloads

Downloads (Last 12 months)1
Downloads (Last 6 weeks)0

Reflects downloads up to 02 Mar 2025

Other Metrics

View Author Metrics

Citations

Cited By

View all

Basnat SAkram MNizamuddin M(2023)Implementation of Ambipolar CNTFET based logic gates and their performance comparison with CNTFET and CMOS based logic gates2023 International Conference on Recent Advances in Electrical, Electronics & Digital Healthcare Technologies (REEDCON)10.1109/REEDCON57544.2023.10150505(56-61)Online publication date: 1-May-2023
https://doi.org/10.1109/REEDCON57544.2023.10150505
Reena Monica P(2022)Seven Strategies to Suppress the Ambipolar Behaviour in CNTFETs: a ReviewSilicon10.1007/s12633-022-01813-514:16(10199-10216)Online publication date: 26-Mar-2022
https://doi.org/10.1007/s12633-022-01813-5
Ponnayan RThazhathu S(2020)One instruction set computer with optimised polarity‐tunable model of double gate CNTFETsIET Circuits, Devices & Systems10.1049/iet-cds.2019.014314:6(770-779)Online publication date: 31-Aug-2020
https://doi.org/10.1049/iet-cds.2019.0143
Risteska AKnipp D(2016)Organic Ambipolar Transistors and CircuitsHandbook of Visual Display Technology10.1007/978-3-319-14346-0_177(971-995)Online publication date: 25-Oct-2016
https://doi.org/10.1007/978-3-319-14346-0_177
Bobba SDe Micheli G(2015)Layout Technique for Double-Gate Silicon Nanowire FETs With an Efficient Sea-of-Tiles ArchitectureIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.235888423:10(2103-2115)Online publication date: Oct-2015
https://doi.org/10.1109/TVLSI.2014.2358884
Risteska AKnipp D(2015)Organic Ambipolar Transistors and CircuitsHandbook of Visual Display Technology10.1007/978-3-642-35947-7_177-1(1-21)Online publication date: 12-Mar-2015
https://doi.org/10.1007/978-3-642-35947-7_177-1
Zarhoun RMoaiyeri MFarahani SNavi K(2014)An Efficient 5-Input Exclusive-OR Circuit Based on Carbon Nanotube FETsETRI Journal10.4218/etrij.14.0113.005136:1(89-98)Online publication date: 1-Feb-2014
https://doi.org/10.4218/etrij.14.0113.0051
Jabeur KO’Connor IYakymets N(2013)Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET)Microelectronics Journal10.1016/j.mejo.2013.09.00144:12(1316-1327)Online publication date: Dec-2013
https://doi.org/10.1016/j.mejo.2013.09.001
Bobba SGaillardon PZhang JDe Marchi MSacchetto DLeblebici YDe Micheli GMoritz C(2012)Process/design co-optimization of regular logic tiles for double-gate silicon nanowire transistorsProceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures10.1145/2765491.2765503(55-60)Online publication date: 4-Jul-2012
https://dl.acm.org/doi/10.1145/2765491.2765503
Jabeur KO'Connor ILe Beux SNavarro DMoritz C(2012)Ambipolar double gate CNTFETs based reconfigurable logic cellsProceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures10.1145/2765491.2765494(7-13)Online publication date: 4-Jul-2012
https://dl.acm.org/doi/10.1145/2765491.2765494
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Abstract

References

Cited By

Index Terms

Recommendations

System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits

Device Model for Ballistic CNFETs Using the First Conducting Band

Carbon nanotube circuits: opportunities and challenges

Comments

Information

Published In

Sponsors

Publisher

Publication History

Permissions

Check for updates

Author Tags

Qualifiers

Funding Sources

Conference

Acceptance Rates

Upcoming Conference

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

Login options

Full Access

View options

PDF

eReader

Share

Share this Publication link

Share on social media

Affiliations