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Correlation verification between transistor variability model with body biasing and ring oscillation frequency in 90nm subthreshold circuits

Published: 11 August 2008 Publication History

Abstract

This paper presents modeling of manufacturing variability and body bias effect for subthreshold circuits based on measurement of a device array circuit in a 90nm technology. The device array consists of P/NMOS transistors and ring oscillators. This work verifies the correlation between the variation model extracted from IV measurement results and oscillation frequencies, which means the transistor-level variation model is examined and confirmed in terms of circuit performance. We demonstrate that delay variations of subthreshold circuits are well characterized with two parameters - threshold voltage and subthreshold swing parameter. We reveal that body bias effect is a less statistical phenomenon and threshold voltage shift by body biasing can be modeled deterministically.

References

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A.W. Wang, B.H. Calhoun, and A.P. Chandrakasan, "Sub-threshold Design For Ultra Low-Power Systems," Springer, NEY YORK, 2006.
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A.W. Wang and A.P. Chandrakasan, "A 180-mV Subthreshold FFT Processor Using a Minimum Energy Design Methodology," IEEE J. Solid-State Circuits, vol.40, pp.310--319, Jan. 2005.
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K. Agarwal, et al., "A Test Structure for Characterizing Local Device Mismatches," in Int. Symp. on VLSI Circuits Dig. Tech. Papers, pp.67--68, Jun. 2006.
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S. Ohkawa, et al., "Analysis and Characterization of Device Variations in an LSI Chip Using an Integrated Device Matrix Array," IEEE Trans. Semiconductor Manufacturing, vol.17, pp.155--165, May. 2004.
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N. Drego, A. Chandrakasan, and D. Boning, "A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays," in Proc. Int. Symp. Quality Electronic Design, pp.281--286, Mar. 2007.
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L.T. Pang and B. Nikolic, "Impact of Layout on 90nm CMOS Process Parameter Fluctuations," in Int. Symp. on VLSI Circuits Dig. Tech. Papers, pp.69--70, Jun. 2006.
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J.W. Tschanz, et al., "Adaptive Body Bias for Reducing Impacts of Die-to-Die and Within-Die Parameter Variations on Microprocessor Frequency and Leakage," IEEE J. Solid-State Circuits, vol.37, pp.1396--1402, Nov. 2002.
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S. Hanson, et al., "Performance and Variability Optimization Strategies in a Sub-200mV, 3.5pJ/inst, 11nW Subthreshold Processor," in Int. Symp. on VLSI Circuits Dig. Tech. Papers, pp.152--153, Jun. 2007.
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D. Levacq, et al., "Spatial Frequency Analysis of Intra-Die Variations with 4-mm 4000 x 1 Transistor Arrays in 90nm CMOS," in Proc. Custom Integrated Circuits Conference, pp.257--260, Sep. 2007.
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Y. Komatsu et al., "Substrate-noise and random-fluctuations reduction with self-adjusted forward body bias," in Proc. Custom Integrated Circuits Conference, pp.35--38, Sep. 2005.
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A. Keshavarzi et al., "Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage," in Proc. Int. Symp. on Low Power Electronics and Design, pp.26--29, Aug. 2005.
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BSIM4 (Berkeley Short-channel IGFET Model 4), "http://www-device.eecs.berkeley.edu/bsim3/bsim4.html"

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  1. Correlation verification between transistor variability model with body biasing and ring oscillation frequency in 90nm subthreshold circuits

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    cover image ACM Conferences
    ISLPED '08: Proceedings of the 2008 international symposium on Low Power Electronics & Design
    August 2008
    396 pages
    ISBN:9781605581095
    DOI:10.1145/1393921
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 11 August 2008

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    Author Tags

    1. body biasing
    2. manufacturing variability
    3. subthreshold circuit

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