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Lithography friendly routing: from construct-by-correction to correct-by-construction

Published: 01 September 2008 Publication History

Abstract

Deep sub-wavelength lithography, e.g., using the 193nm lithography to print 45nm, 32nm, and even 22nm integrated circuits, is one of the most fundamental limitations for the continuous CMOS scaling. Lithography printability is strongly layout dependent. Routing is the last major physical design step before tapeout, thus it plays an important role in addressing the overall circuit manufacturability and product yield. This talk will discuss some recent advancement of lithography friendly routing from post-routing hotspot fixing (construct-by-correction) to during-routing hotspot avoidance (correct-by-construction) guided by predictive post-OPC lithography metrics. We will compare the quality of results and runtime of these approaches, and show how to combine them. We will also discuss the emerging research needs, such as double patterning lithography for 32nm and 22nm nodes and how routing may cope with them.

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  • (2013)Design for Manufacturing With Emerging NanolithographyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2013.227675132:10(1453-1472)Online publication date: 1-Oct-2013

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  1. Lithography friendly routing: from construct-by-correction to correct-by-construction

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    cover image ACM Conferences
    SBCCI '08: Proceedings of the 21st annual symposium on Integrated circuits and system design
    September 2008
    256 pages
    ISBN:9781605582313
    DOI:10.1145/1404371
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 01 September 2008

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    • (2013)Design for Manufacturing With Emerging NanolithographyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2013.227675132:10(1453-1472)Online publication date: 1-Oct-2013

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