ABSTRACT
The trend towards object-oriented software construction is becoming more and more prevalent, and parallel programming cannot be an exception. In the context of parallel computation, it is often natural to model the computation as message passing between autonomous, concurrently active objects. The problem was, as some previous studies had indicated, that the overhead from message reception to dynamic method dispatching consumes a significant amount of execution time (e.g., as much as 4000 machine cycles or 500 μseconds at 8 MHz block for some language/hardware combination). Our ABCL/onEM-4, a software/hardware implementation architecture for a concurrent object-oriented language, overcomes this problem with technologies such as address-specifiable reactive packet-driven architecture, zero-overhead context switching, and packet-driven allocation of message boxes. Preliminary performance measurements on a real hardware EM-4 confirm our claim, achieving the performance of up to nearly 10 μseconds (130 clocks) total for a remote object-creation followed by a request message send to the created object and a reply reception from the object, for a 12.5 MHz clock speed. Our results indicate that the concurrent object-oriented computational model and languages are highly viable with proper implementational software/hardware architectures.
- 1.Gul Agha. Actors : A Model of Concurrent Computation in Distributed Systems. The MIT Press, 1987. Google ScholarDigital Library
- 2.Pierre America and Jan Rutten. A layered semantics for a parallel object-oriented languages. In J. W. de Bakker, W. P. de Roever, and G. Rozenberg, editors, Proc. of REX/FOOL, Noordwijkerhout, The Netherlands, volume 489 of Lecture Notes in Computer Science, pages 91-123. Springer-Verlag, May/June 1991}. Google ScholarDigital Library
- 3.Lex Augusteijn. Garbage collection in a distributed environment. In J. W. de Bakker, A. 3. Nijiman, and P. C. Treleaven, editors, Proc. of PARLE, Eindhoven, The Netherlands, volume 259 of Lecture Notes in Computer Science, pages 75-93. Springer-Verlag, June 1987. Google Scholar
- 4.Takanobu Baba, Tsutomu ~oshinaga, Tohru Iijima, Yoshifumi Iwamoto, Masahiro Hamada, and Mitsuru Suzuki. A parallel object-oriented total architecture: A- NET. In Proc. of Supercomputing'90, New York, pages 276-285, November 1990. Google ScholarDigital Library
- 5.William 3. Dally. The J-machine: System support for Actors. In Carl Hewitt and Gul Agha, editors, Knowledge Processing: An Actor Perspective. The MIT Press, 1989.Google Scholar
- 6.Kohei Honda and Mario Tokoro. An object calculus for asynchronous communication. In Pierre America, editor, Proc. of ECOOP'91, Geneva, Switzerland, volume 512 of Lecture Notes in Computer Science, pages 133-147. Springer-Verlag, July 1991. Google ScholarDigital Library
- 7.Waldemar Horwat. Concurrent smalltalk on the message-driven processor. Master's thesis, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, May 1989.Google Scholar
- 8.Waldemar Horwat, Andrew A. Chien, and William 3. Dally. Experience with CST: Programming and implementation. In Proc. of the SIGPLAN'89 Conference on Programming Language Design and Implementation, Portland, Oregon, pages 101-109, June 1989. Google ScholarDigital Library
- 9.Hiroaki ishihata, Takeshi Horie, Satoshi Inano, Toshiyuki Shimizu, and Sadayuki Kato. An architecture of highly parallel computer AP1000. In IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, pages 13-16, May 1991.Google Scholar
- 10.David R. :lefferson. Virtual time. A CM Transactions on Programming Languages and Systems, 7(3):404-425, 1985. Google ScholarDigital Library
- 11.Yuetsu Kodama, Shichi Sakai, and Yoshinori Yamaguchi. A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation, in Proc. of InfoJapan '90, pages 291-298, 1990.Google Scholar
- 12.Jos~ Meseguer. A logical theory of concurrent objects. In Proc. of OOPSLA/ECOOP'90, Ottawa, Canada, pages 101-115, October 1990. Google ScholarDigital Library
- 13.Shuichi Sakai, Yoshinori Yamaguchi, Kei I-Iiraki, Yuetsu Kodama, and Toshitsugu Yuba. An architecture of a dataflow single chip processor. In Proc. of the 16th Annual International Symposium on Computer Architecture, pages 46-53, June 1989. Google ScholarDigital Library
- 14.Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi, and Yasuhito Koumura. Thread-based programming for the EM-4 hybrid dataflow machine. In Proc. of the 19th Annual International Symposium on Computer Architecture, May 1992. Google ScholarDigital Library
- 15.Etsuya Shibayama. An Object-Based Approach to Modeling Concurrent Systems. PhD thesis, Department of Information Science, The University of Tokyo, 1991.Google Scholar
- 16.Etsuya Shibayama and Akinori Yonezawa. Distributed discrete event simulation in ABCL/1. In Akinori Yonezawa, editor, ABCL: An Object-Oriented Concurrent System, chapter 9. The MIT Press, 1990.Google Scholar
- 17.Masahiro Yasugi and Akinori Yonezawa. An objectoriented concurrent algorithm for N-body problem. In Proc. of JSSST 8th Annual Convention, Sapporo, Japan, pages 405-408, September 1991. (in Japanese).Google Scholar
- 18.Akinori Yonezawa, editor. ABCL: An Object-Oriented Concurrent System ~ Theory, Language, Programming, Implementation and Application. The MIT Press, 1990. Google ScholarDigital Library
- 19.Akinori Yonezawa, Jean-Pierre Briot, and Etsuya Shibayama. Object-oriented concurrent programming in ABCL/1. In Proc. of A CM Conference on OOPSLA, pages 258-268, 1986. Google ScholarDigital Library
- 20.Akinori Yonezawa and Ichiro Ohsawa. Object-oriented parallel parsing for context free grammars. In Akinori Yonezawa, editor, ABCL: An Object-Omented Concurrent System, chapter 11. The MIT Press, 1990.Google Scholar
Index Terms
- ABCL/onEM-4: a new software/hardware architecture for object-oriented concurrent computing on an extended dataflow supercomputer
Recommendations
Hardwired MPEG-4 repetitive padding
We consider two hardwired solutions for repetitive padding, a performance restricting algorithm for real time MPEG-4 execution. The first solution regards application specific implementations, the second regards general purpose processing. For the ...
FPGA-oriented HW/SW implementation of the MPEG-4 video decoder
This paper presents an FPGA-oriented implementation methodology for the MPEG-4 video decoder based on a hardware/software co-design approach. The MPEG-4 decoder is based on MoMuSys optimized reference software combined with new hardware VLSI ...
Scalable MPEG-4 encoder on FPGA multiprocessor SOC
High computational requirements combined with rapidly evolving video coding algorithms and standards are a great challenge for contemporary encoder implementations. Rapid specification changes prefer full programmability and configurability both for ...
Comments