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On the limits of program parallelism and its smoothability
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Source International Symposium on Microarchitecture archive
Proceedings of the 25th annual international symposium on Microarchitecture table of contents
Portland, Oregon, United States
Pages: 10 - 19  
Year of Publication: 1992
ISBN:0-8186-3175-9
Also published in ...
Authors
Kevin B. Theobald
Guang R. Gao
Laurie J. Hendren
Sponsors
IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 33,   Citation Count: 11
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
Anant Agarwal , Beng-Hong Lim , David Kranz , John Kubiatowicz, APRIL: a processor architecture for multiprocessing, ACM SIGARCH Computer Architecture News, v.18 n.3a, p.104-114, June 1990
2
Todd M. Austin , Gurindar S. Sohi, Dynamic dependency analysis of ordinary programs, Proceedings of the 19th annual international symposium on Computer architecture, p.342-351, May 19-21, 1992, Queensland, Australia
3
Michael Butler , Tse-Yu Yeh , Yale Patt , Mitch Alsup , Hunter Scales , Michael Shebanow, Single instruction stream parallelism is greater than two, Proceedings of the 18th annual international symposium on Computer architecture, p.276-286, May 27-30, 1991, Toronto, Ontario, Canada
4
David E. Culler , Anurag Sah , Klaus E. Schauser , Thorsten von Eicken , John Wawrzynek, Fine-grain parallelism with minimal hardware support: a compiler-controlled threaded abstract machine, Proceedings of the fourth international conference on Architectural support for programming languages and operating systems, p.164-175, April 08-11, 1991, Santa Clara, California, United States
5
W. J. Dally , L. Chao , A. Chien , S. Hassoun , W. Horwat , J. Kaplan , P. Song , B. Totty , S. Wills, Architecture of a message-driven processor, Proceedings of the 14th annual international symposium on Computer architecture, p.189-196, June 02-05, 1987, Pittsburgh, Pennsylvania, United States  [doi>10.1145/30350.30372]
6
N. P. Jouppi , D. W. Wall, Available instruction-level parallelism for superscalar and superpipelined machines, Proceedings of the third international conference on Architectural support for programming languages and operating systems, p.272-282, April 03-06, 1989, Boston, Massachusetts, United States
7
D. J. Kuck , R. H. Kuhn , D. A. Padua , B. Leasure , M. Wolfe, Dependence graphs and compiler optimizations, Proceedings of the 8th ACM SIGPLAN-SIGACT symposium on Principles of programming languages, p.207-218, January 26-28, 1981, Williamsburg, Virginia  [doi>10.1145/567532.567555]
 
8
D. J. Kuck, Y. Muraoka, and S. C. Chen, "On the number of operations simultaneously executable in FORTRAN-like programs and their resulting speed-up," IEEE-TC, vol. C-21, pp. 1293-1310, Dec. 1972.
 
9
M. Kumar, Measuring Parallelism in Computation-Intensive Scientific/Engineering Applications, IEEE Transactions on Computers, v.37 n.9, p.1088-1098, September 1988  [doi>10.1109/12.2259 ]
10
Monica S. Lam , Robert P. Wilson, Limits of control flow on parallelism, Proceedings of the 19th annual international symposium on Computer architecture, p.46-57, May 19-21, 1992, Queensland, Australia
 
11
A. Nicolau and J. A. Fisher, "Measuring the parallelism available for very long instruction word architectures," IEEE-TC, vol. C-33, pp. 968-976, Nov. 1984.
12
R. S. Nikhil, Can dataflow subsume von Neumann computing?, Proceedings of the 16th annual international symposium on Computer architecture, p.262-272, April 1989, Jerusalem, Israel
13
Gregory M. Papadopoulos , David E. Culler, Monsoon: an explicit token-store architecture, ACM SIGARCH Computer Architecture News, v.18 n.3a, p.82-91, June 1990
 
14
E. M. Riseman and C. C. Foster, "The inhibition of potential parallelism by conditional jumps," {EEE-TC, vol. C-21, pp. 1405-1411, Dec. 1972.
 
15
James E. Smith, A study of branch prediction strategies, Proceedings of the 8th annual symposium on Computer Architecture, p.135-148, May 12-14, 1981, Minneapolis, Minnesota, United States
 
16
K. B. Theobald, G. R. Gao, and L. J. Hen dren, "On the limits of program parallelism and its smoothability," ACAPS Tech. Memo 40, Sch. of Comp. Sci., McGill U., Montrdal, Qua., Jun. 1992.
 
17
G. S. Tjaden and M. J. Flynn, "Detection and parallel execution of independent instructions," IEEE-TC, vol. C-19, pp. 889-895, Oct. 1970.
18
David W. Wall, Limits of instruction-level parallelism, Proceedings of the fourth international conference on Architectural support for programming languages and operating systems, p.176-188, April 08-11, 1991, Santa Clara, California, United States

CITED BY  11
 
Mikko H. Lipasti , John Paul Shen, Exceeding the dataflow limit via value prediction, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.226-237, December 02-04, 1996, Paris, France
 
Lawrence Rauchwerger , Pradeep K. Dubey , Ravi Nair, Measuring limits of parallelism and characterizing its vulnerability to resource constraints, Proceedings of the 26th annual international symposium on Microarchitecture, p.105-117, December 01-03, 1993, Austin, Texas, United States
Derek B. Noonburg , John P. Shen, Theoretical modeling of superscalar processor performance, Proceedings of the 27th annual international symposium on Microarchitecture, p.52-62, November 30-December 02, 1994, San Jose, California, United States
Kevin B. Theobald , Guang R. Gao , Laurie J. Hendren, Speculative execution and branch prediction on parallel machines, Proceedings of the 7th international conference on Supercomputing, p.77-86, July 19-23, 1993, Tokyo, Japan
 
Rafael Rico , Juan-Ignacio Pérez , José Antonio Frutos, The impact of x86 instruction set architecture on superscalar processing, Journal of Systems Architecture: the EUROMICRO Journal, v.51 n.1, p.63-77, January 2005
José González , Antonio González, The potential of data value speculation to boost ILP, Proceedings of the 12th international conference on Supercomputing, p.21-28, July 1998, Melbourne, Australia
 
Wayne Yamamoto , Mario Nemirovsky, Increasing superscalar performance through multistreaming, Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques, p.49-58, June 27-29, 1995, Limassol, Cyprus
Sid-Ahmed-Ali Touati , Denis Barthou, On the decidability of phase ordering problem in optimizing compilation, Proceedings of the 3rd conference on Computing frontiers, May 03-05, 2006, Ischia, Italy
 
Kemal Ebcioğlu , Erik R. Altman , Michael Gschwind , Sumedh Sathaye, Optimizations and oracle parallelism with dynamic translation, Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture, p.284-295, November 16-18, 1999, Haifa, Israel
 
Lieven Eeckhout , Koen De Bosschere, Quantifying behavioral differences between multimedia and general-purpose workloads, Journal of Systems Architecture: the EUROMICRO Journal, v.48 n.6-7, p.199-220, January 2003
 
Pradeep K. Dubey , Kevin O'Brien , Kathryn M. O'Brien , Charles Barton, Single-program speculative multithreading (SPSM) architecture: compiler-assisted fine-grained multithreading, Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques, p.109-121, June 27-29, 1995, Limassol, Cyprus

INDEX TERMS

Primary Classification:
  D. Software
  D.1 PROGRAMMING TECHNIQUES
      D.1.3 Concurrent Programming
          Subjects: Parallel programming

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Parallel circuits

  C. Computer Systems Organization
  C.0 GENERAL
      Subjects: Instruction set design (e.g., RISC, CISC, VLIW)
  C.1 PROCESSOR ARCHITECTURES
      C.1.2 Multiple Data Stream Architectures (Multiprocessors)
          Subjects: Parallel processors**
  C.4 PERFORMANCE OF SYSTEMS
      Subjects: Modeling techniques


General Terms:
Algorithms, Design, Performance


Keywords:
computer architecture modeling, instruction-level parallelism, parallel processing, program parallelism, program smoothability

Collaborative Colleagues:
Kevin B. Theobald: colleagues
Guang R. Gao: colleagues
Laurie J. Hendren: colleagues

Peer to Peer - Readers of this Article have also read:
This Article has also been published in:

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