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Toward zero-cost branches using instruction registers

Published:10 December 1992Publication History
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References

  1. 1 J.A. Bondy and U.S.R. Murty. Graph Theory with Applications. Elsevier Science Publishing Co., Inc., 1976. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2 G. Chaitin et al. Register allocation via coloring. Computer Languages, 6:47-57, 1981.Google ScholarGoogle ScholarCross RefCross Ref
  3. 3 J. Davidson and D. Whalley. Reducing the cost of branches by using registers. In ISCA 17, pages 182-191, 1990. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4 D. Ditzel and H. McLellan. Branch folding in the crisp microprocessor: Reducing brandl delay to zero. In ISCA 1,i, pages 2-9, 1987. Google ScholarGoogle Scholar
  5. 5 C. N. Fischer and R. J. LeBlaalc. Crafting a Compiler. The Benjamin/CununJngs Publishing Conlpany, Inc., 1988. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6 J. Hemlessy and D. Patterson. Computer Architecture: A Quantitative Approach. Morgan Kaufmann, 1990. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. 7 IBM. IBM RISC System//6000 Technology. IBM, 1990.Google ScholarGoogle Scholar
  8. 8 M. Jolmson. Superscalar Microprocessor Design. Prentice Hall, 1991.Google ScholarGoogle Scholar
  9. 9 J. Lee aald A. J. Smith. Branch prediction strategies and branch target buffer design. IEEE Computer, pages 6-22, January 1984.Google ScholarGoogle Scholar
  10. 10 D. Lilja. Reducing the branch penalty in pipelined processors. Computer, 21(7):47-55, July 1988. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. 11 Sml Microsystems. The $PARC Architecture Manual, Version 7. Still Microsystelns, 1987.Google ScholarGoogle Scholar
  12. 12 Hewlett Packard. PA-RISC 1.1 Architecture and Instruction Set Reference Manual. Hewlett Packard, 1990.Google ScholarGoogle Scholar
  13. 13 T. Yeh and Y. N. Patt. Alternative implementations of twolevel adaptive branch prediction. In I$CA 19, pages 124-1:34, 1992. Google ScholarGoogle Scholar

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          cover image ACM SIGMICRO Newsletter
          ACM SIGMICRO Newsletter  Volume 23, Issue 1-2
          Dec. 1992
          300 pages
          ISSN:1050-916X
          DOI:10.1145/144965
          Issue’s Table of Contents
          • cover image ACM Conferences
            MICRO 25: Proceedings of the 25th annual international symposium on Microarchitecture
            December 1992
            301 pages
            ISBN:0818631759

          Copyright © 1992 Authors

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          Association for Computing Machinery

          New York, NY, United States

          Publication History

          • Published: 10 December 1992

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