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Automatically transforming and relating Uppaal models of embedded systems

Published: 19 October 2008 Publication History

Abstract

Relations between models are important for effective automatic validation, for comparing implementations with specifications, and for increased understanding of embedded systems designs. Timed automata may be used to model a system at multiple levels of abstraction, and timed trace inclusion is one way to relate the models.
It is known that a deterministic and Τ-free timed automaton can be transformed such that reachability analysis can decide timed trace inclusion with another timed automaton. Performing the transformation manually is tedious and error-prone. We have developed a tool that does it automatically for a large subset of Uppaal models.
Certain features of the Uppaal modeling language, namely selection bindings and channel arrays, complicate the transformation. We formalize these features and extend the validation technique to incorporate them. We find it impracticable to manipulate some forms of channel array subscripts, and some combinations of selection bindings and universal quantifiers; doing so either requires premature parameter instantiation or produces models that Uppaal rejects.

References

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T. A. Henzinger, X. Nicollin, J. Sifakis, and S. Yovine. Symbolic model checking for real-time systems. Information & Computation, 111(2):192--244, June 1994.
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H. E. Jensen, K. G. Larsen, and A. Skou. Scaling up Uppaal: Automatic verification of real-time systems using compositionality and abstraction. In M. Joseph, editor, Proc. 6th Int. Symp. Formal Techniques for Real-Time and Fault-Tolerance, volume 1926 of LNCS, pages 19--30, Pune, India, Sept. 2000. Springer-Verlag.
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K. G. Larsen, P. Pettersson, and Y. Wang. Uppaal in a nutshell. Int. J. Software Tools for Technology Transfer, 1(1-2):134--152, Oct. 1997.
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N. Lynch and F. Vaandrager. Forward and backward simulations. Part I: Untimed systems. Information & Computation, 121(2):214--233, Sept. 1995.
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M. I. Stoelinga. Alea Jacta est: Verification of probabilistic, real-time and parametric systems. PhD thesis, Katholieke Universiteit Nijmegen, Apr. 2002.
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Y. Wang, P. Pettersson, and M. Daniels. Automatic verification of real-time communicating systems by constraint-solving. In D. Hogrefe and S. Leue, editors, Formal Description Techniques VII, pages 223--238, Berne, Switzerland, 1994. IFIP, Chapman & Hall.

Cited By

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  • (2016)Estimating latency and concurrency of asynchronous real-time interactive systems using model checking2016 IEEE Virtual Reality (VR)10.1109/VR.2016.7504688(57-66)Online publication date: Mar-2016
  • (2015)Real-time specificationsInternational Journal on Software Tools for Technology Transfer (STTT)10.1007/s10009-013-0286-x17:1(17-45)Online publication date: 1-Feb-2015
  • (2013)Analyzing an embedded sensor with timed automata in uppaalACM Transactions on Embedded Computing Systems10.1145/2539036.253904013:3(1-26)Online publication date: 24-Dec-2013
  • Show More Cited By

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cover image ACM Conferences
EMSOFT '08: Proceedings of the 8th ACM international conference on Embedded software
October 2008
284 pages
ISBN:9781605584683
DOI:10.1145/1450058
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 19 October 2008

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Author Tags

  1. Uppaal
  2. model transformation
  3. timed trace inclusion

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  • Research-article

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ESWEEK 08
ESWEEK 08: Fourth Embedded Systems Week
October 19 - 24, 2008
GA, Atlanta, USA

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Overall Acceptance Rate 60 of 203 submissions, 30%

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Cited By

View all
  • (2016)Estimating latency and concurrency of asynchronous real-time interactive systems using model checking2016 IEEE Virtual Reality (VR)10.1109/VR.2016.7504688(57-66)Online publication date: Mar-2016
  • (2015)Real-time specificationsInternational Journal on Software Tools for Technology Transfer (STTT)10.1007/s10009-013-0286-x17:1(17-45)Online publication date: 1-Feb-2015
  • (2013)Analyzing an embedded sensor with timed automata in uppaalACM Transactions on Embedded Computing Systems10.1145/2539036.253904013:3(1-26)Online publication date: 24-Dec-2013
  • (2010)New results on timed specificationsProceedings of the 20th international conference on Recent Trends in Algebraic Development Techniques10.1007/978-3-642-28412-0_12(175-192)Online publication date: 1-Jul-2010

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