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Distributed and low-power synchronization architecture for embedded multiprocessors

Published: 19 October 2008 Publication History

Abstract

In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed architecture effectively implements the queued-lock semantics in a completely distributed way. The proposed approach to synchronization implementation not only completely eliminates the overwhelming bus contention traffic when multiple cores compete for a synchronization variable, but also achieves very high energy efficiency as the local synchronization controller can efficiently determine, without any bus transactions or local cache spinning, the exact timing of when the lock is made available to the local processor. Application-specific information regarding synchronization variables in the local task is exploited in implementing the distributed synchronization protocol. The local synchronization controllers enable the system software or the thread library to implement various low-power policies, such as disabling the cache accesses or even completely powering down the local processor while waiting for a synchronization variable.

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Cited By

View all
  • (2014)$C\!\!-\!\!Lock$ : Energy Efficient Synchronization for Embedded Multicore SystemsIEEE Transactions on Computers10.1109/TC.2013.8463:8(1962-1974)Online publication date: Aug-2014
  • (2013)Efficient Implementation of Application-Aware Spinlock Control in MPSoCsInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20130101044:1(64-84)Online publication date: 1-Jan-2013
  • (2012)An efficient asymmetric distributed lock for embedded multiprocessor systems2012 International Conference on Embedded Computer Systems (SAMOS)10.1109/SAMOS.2012.6404172(176-182)Online publication date: Jul-2012
  • Show More Cited By

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Published In

cover image ACM Conferences
CODES+ISSS '08: Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
October 2008
288 pages
ISBN:9781605584706
DOI:10.1145/1450135
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 19 October 2008

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Author Tags

  1. multiprocessor
  2. synchronization

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  • Research-article

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ESWEEK 08
ESWEEK 08: Fourth Embedded Systems Week
October 19 - 24, 2008
GA, Atlanta, USA

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CODES+ISSS '08 Paper Acceptance Rate 44 of 143 submissions, 31%;
Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

View all
  • (2014)$C\!\!-\!\!Lock$ : Energy Efficient Synchronization for Embedded Multicore SystemsIEEE Transactions on Computers10.1109/TC.2013.8463:8(1962-1974)Online publication date: Aug-2014
  • (2013)Efficient Implementation of Application-Aware Spinlock Control in MPSoCsInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20130101044:1(64-84)Online publication date: 1-Jan-2013
  • (2012)An efficient asymmetric distributed lock for embedded multiprocessor systems2012 International Conference on Embedded Computer Systems (SAMOS)10.1109/SAMOS.2012.6404172(176-182)Online publication date: Jul-2012
  • (2012)Application-aware spinlock control using a hardware scheduler in MPSoC platforms2012 International Symposium on System on Chip (SoC)10.1109/ISSoC.2012.6376352(1-6)Online publication date: Oct-2012
  • (2010)Handling shared variable synchronization in multi-core Network-on-Chips with distributed memory23rd IEEE International SOC Conference10.1109/SOCC.2010.5784680(467-472)Online publication date: Sep-2010
  • (2010)Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation TechniqueProceedings of the 2010 IEEE Annual Symposium on VLSI10.1109/ISVLSI.2010.16(462-463)Online publication date: 5-Jul-2010

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