H. F. Welsh
ABSTRACT
Synopsis: The magnetic drum-file memory system described in this paper was designed for the Univac-Larc computing system as storage that would be intermediate in speed and in capacity between the Uniservo magnetic tapes and the ultra high-speed magnetic-core memory. Although designed for Univac-Larc, the drum-file memory system may be used for any type of systematic data processing where extremely short access time is not required and economy is an important consideration. Economy is achieved through the use of a single flying head, which can move parallel to the axis of the drum and perform the read-write operations for the entire drum. This arrangement eliminates the need for close mechanical tolerances and elaborate switching devices. The drum-file memory may also be used as a random-access device where a delay of a second or two is not critical, as, for example, in checking a particular item of an inventory.
Recommendations
A high performance file system for non-volatile main memory
EuroSys '16: Proceedings of the Eleventh European Conference on Computer SystemsEmerging non-volatile main memories (NVMMs) provide data persistence at the main memory level. To avoid the double-copy overheads among the user buffer, the OS page cache, and the storage layer, state-of-the-art NVMM-aware file systems bypass the OS ...
Enabling Hybrid PCM Memory System with Inherent Memory Management
RACS '16: Proceedings of the International Conference on Research in Adaptive and Convergent SystemsReplacing the traditional volatile main memory, e.g., DRAM, with a non-volatile phase change memory (PCM) has become a possible solution to reduce the energy consumption of computing systems. To further reduce the bit cost of PCM, the development trend ...
In-memory file system for non-volatile memory
RACS '13: Proceedings of the 2013 Research in Adaptive and Convergent SystemsCurrent memory system hierarchy consists of cache memory, main memory, and secondary storage. Each level in this hierarchy has a different access speed to tolerate the long latency of the lower level but supports a large capacity as a whole memory ...
Comments