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Distributed processing with iAPX 186 microprocessor systems

Published: 07 June 1982 Publication History

Abstract

In most early computer systems, large central computers, minicomputers, or microcomputers were used to perform all the necessary data processing activities in the system. The overall performance of the entire system was limited by the ability of the central CPU to bring in data, process it, and output it in some usable format. This often resulted in large data input/output bottlenecks in I/O-intensive applications where the CPU time required to service I/O functions left little time for data processing. The obvious result is a slow, nonoptimum data processing system. Now many applications are moving in the direction of simpler and easier-to-use distributed systems, where a central CPU delegates some of the processing tasks to distributed processing subsystems. Not only are costs lower with the distributed system approach, but the time needed to implement such systems is substantially less.
For example, a network transaction processing system can now use numerous automatic tellers to process data at a variety of dispersed geographic locations. The tellers, or distributed nodes, can then collect, process, output, and eventually pass on necessary information to the central host computer, located at some detached location, without burdening the central computer with handling each simple transaction. The host becomes involved with an individual node only when the intelligent node requires the timely interaction. The heart of a distributed node itself must be an intelligent processing device capable of handling all the processing and I/O requirements needed by the node.
The iAPX 186 is a new highly integrated 16-bit microprocessor. It combines 10 of the most common microprocessor system components onto one. The 80186 is essentially a 16-bit CPU board integrated onto a single silicon chip. By combining a limited number of peripheral support components with memory together with an iAPX 186, one can achieve a condensed, cost-effective system on one board, making the 80186 an optimal microprocessor for distributed processing nodes. This high level of integration is accomplished through an advanced HMOS II silicon gate technology. For the first time it provides a system cost saving significantly greater than that of the previous 16-bit microprocessor design alternatives. The 80186, an upgrade from the industry standard iAPX 86 and 88, offers two to three times the system throughput of a standard iAPX 86. The iAPX 186 adds 10 new instruction types to optimize existing iAPX 86 or 88 application code or streamline new iAPX 186 application code. All these hardware and software attributes make distributed processing with iAPX 186 systems a cost-effective, easy 16-bit microprocessor solution.

References

[1]
Thierauf, Robert J. "Distributed Processing Systems." Englewood Cliffs, New Jersey: Prentice-Hall, 1978.
[2]
Down, P. J., and F. E. Taylor. "Why Distributed Computing?" Rochelle Park, New Jersey: Hayden Book Company, 1977.
[3]
Moore, W. G. "Going Distributed." Mini-Micro Systems, 10 (1977), pp. 41, 44, 46, 48.
[4]
Klovstad, J., and S. Kopec. "iAPX 186 Target Specification Revision 2." Intel preliminary design document. October 16, 1980.
[5]
Klovstad, J., and S. Kopec. "iAPX 186 Architectural Overview Revised May 1981." Intel overview document, available from Intel Corporation, Santa Clara, California.
[6]
Heller, P. "The Intel iAPX 286 Microprocessor." IEEE Wescon Trade Show Proceedings, San Francisco, 1981.
[7]
Kop, H. "16-Bit Microprocessor Benchmark Report: iAPX 86/10, Z8000, MC68000." Intel Corporation, 1981.
[8]
Intel Corporation. Perperal Design Handbook, Available from Intel Corporation, Santa Clara, California. 1981.

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cover image ACM Other conferences
AFIPS '82: Proceedings of the June 7-10, 1982, national computer conference
June 1982
857 pages
ISBN:088283035X
DOI:10.1145/1500774
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 June 1982

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