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Reconfigurable multicomputer networks for very fast real-time applications

Published: 07 June 1982 Publication History

Abstract

This paper introduces concurrent reconfiguration techniques that perform fast reconfiguration of a multicomputer network into the following network structures: K-rooted trees, stars, and rings with selectable periods. These structures prove to be very efficient for high-speed, real-time applications. The techniques introduced are based on shift register theory and are performed by special shift registers residing in each network node and called shift registers with variable bias.
The technique discussed in this paper are implemented in the system with dynamic architecture that is now under construction by Dynamic Computer Architecture, Inc.
The time of the network reconfiguration equals that of one clock period, since to perform reconfiguration into a new network structure, each network node should execute only two logical operations---one-bit shift and mod 2 addition.

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Cited By

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  • (1993)Architecture features and evaluation of a variable-topology multiprocessor for real-time applicationsProceedings of 36th Midwest Symposium on Circuits and Systems10.1109/MWSCAS.1993.343122(1-4)Online publication date: 1993
  • (1991)Reconfigurable SIMD massively parallel computersProceedings of the IEEE10.1109/5.9203879:4(429-443)Online publication date: Apr-1991
  • (1988)A Distributed Resource Management Mechanism for a Partitionable Multiprocessor SystemIEEE Transactions on Computers10.1109/12.214937:2(201-210)Online publication date: 1-Feb-1988
  • Show More Cited By

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cover image ACM Other conferences
AFIPS '82: Proceedings of the June 7-10, 1982, national computer conference
June 1982
857 pages
ISBN:088283035X
DOI:10.1145/1500774
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 June 1982

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Cited By

View all
  • (1993)Architecture features and evaluation of a variable-topology multiprocessor for real-time applicationsProceedings of 36th Midwest Symposium on Circuits and Systems10.1109/MWSCAS.1993.343122(1-4)Online publication date: 1993
  • (1991)Reconfigurable SIMD massively parallel computersProceedings of the IEEE10.1109/5.9203879:4(429-443)Online publication date: Apr-1991
  • (1988)A Distributed Resource Management Mechanism for a Partitionable Multiprocessor SystemIEEE Transactions on Computers10.1109/12.214937:2(201-210)Online publication date: 1-Feb-1988
  • (1987)Analysis and synthesis of dynamic multicomputer networks that reconfigure into rings, trees, and starsIEEE Transactions on Computers10.1109/TC.1987.167697936:7(823-844)Online publication date: 1-Jul-1987
  • (1986)Data Exchange Optimization in ReconfigurableIEEE Transactions on Computers10.1109/TC.1986.167674935:3(257-273)Online publication date: 1-Mar-1986
  • (1986)Reconfiguration Procedures for a Polymorphic and Partitionable MultiprocessorIEEE Transactions on Computers10.1109/TC.1986.167668335:10(910-916)Online publication date: 1-Oct-1986
  • (1986)Adaptable Software for Dynamic ArchitecturesComputer10.1109/MC.1986.166315019:2(61-77)Online publication date: 1-Feb-1986
  • (1986)Adaptable Software and HardwareComputer10.1109/MC.1986.166314719:2(29-39)Online publication date: 1-Feb-1986
  • (1985)Reconfiguration Strategies for Parallel ArchitecturesComputer10.1109/MC.1985.166277618:12(44-61)Online publication date: 1-Dec-1985
  • (1984)Efficient Internode Communications in Reconfigurable Binary TreesIEEE Transactions on Computers10.1109/TC.1984.167637233:11(977-990)Online publication date: 1-Nov-1984

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