skip to main content
10.1145/1500774.1500801acmotherconferencesArticle/Chapter ViewAbstractPublication PagesafipsConference Proceedingsconference-collections
research-article
Free access

A systolic processor for signal processing

Published: 07 June 1982 Publication History

Abstract

A systolic array is a natural architecture for a high-performance signal processor, in part because of the extensive use of inner-product operations in signal processing. The modularity and simple interconnection of systolic arrays promise to simplify the development of cost-effective, high-performance, special-purpose processors. ESL Incorporated has built a proof of concept model of a systolic processor. It is flexible enough to permit experimentation with a variety of algorithms and applications. ESL is exploring the application of systolic processors to image- and signal-processing problems. This paper describes this experimental system and some of its applications to signal processing. ESL is also pursuing new types of systolic architectures, including the VLSI implementation of systolic cells for solving systems of linear equations. These new systolic architectures allow the real-time design of adaptive filters.

References

[1]
Kung, H. T. "Special-Purpose Devices for Signal and Image Processing: an Opportunity in Very Large Scale Integration (VLSI)." Proceedings of the Society of Photo-Optical Instrumentation Engineers, 241 (1980), pp. 76--84.
[2]
Kung, H. T. "Why Systolic Architectures?" Computer, January 1982.
[3]
Kung, H. T., and C. E. Leiserson. "Systolic Arrays (for VLSI)." In I. S. Duff and G. W. Stewart (eds.), Sparse Matrix Proceedings, 1978. Philadelphia, Pennsylvania: Society for Industrial and Applied Mathematics, 1979, pp. 256--282. (A slightly different version appears in Mead, C. A., and L. A. Conway. Introduction to VLSI Systems. Reading, Massachusetts: Addison-Wesley, 1980, section 8.3.)
[4]
Kung, H. T. "Notes on VLSI Computation." CREST Parallel Processing Systems Course, Loughborough, England, 1980.
[5]
Kulkarni, A., and D. Yen. "The ESL Systolic Processor for Signal and Image Processing." Proceedings of Workshop on Computer Architectures for Pattern Analysis and Image Database Management, 1981.
[6]
Kung, H. T., and R. L. Picard. "Hardware Pipelines for Multi-Dimensional Convolution and Resampling." Proceedings of Workshop on Computer Architectures for Pattern Analysis and Image Database Management, 1981.
[7]
Blackmer, J., G. Frank, and P. Kuekes. "A 200 MOPS Systolic Processor." Proceedings of the Society of Photo-Optical Instrumentation Engineers, 298 (1981).
[8]
Brigham, E. The Fast Fourier Transform. Englewood Cliffs, New Jersey: Prentice-Hall, 1974.
[9]
Kulkarni, A. "Everything You Thought A MAC-Based Linear Systolic Array Could Do But Were Skeptical About!" Technical Memo, ESL APTL, 1981.
[10]
Speiser, J. M., and H. J. Whitehouse. "Architectures for Real-Time Real-Time Matrix Operations." Government Microcircuits Applications Conference, Houston, 1980.
[11]
Schmidt, R. "Multiple Emitter Loaction and Signal Parameter Estimation." Proceedings of the RADC Spectrum Estimation Workshop, Rome Air Development Center, Griffiss Air Force Base, N.Y., October 1979.
[12]
Andrews, H. C., and C. L. Patterson. "Singular Value Decomposition (SVD) Image Coding." IEEE Transaction Communications, 24:4 (1976), pp. 425--432.
[13]
Widrow, B. "Adaptive Filters." In Kalman, R. E., and N. DeClaris (eds.), Aspects of Network and Control Theory. New York: Holt, Rinehart, and Winston, 1970, pp. 563--587.
[14]
Gentleman, M., and H. T. Kung. "Matrix Triangularization by Systolic Arrays." Proceedings of the Society of Photo-Optical Instrumentation Engineers, 298 (1981).

Cited By

View all
  1. A systolic processor for signal processing

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Other conferences
    AFIPS '82: Proceedings of the June 7-10, 1982, national computer conference
    June 1982
    857 pages
    ISBN:088283035X
    DOI:10.1145/1500774
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    • AFIPS: American Federation of Information Processing Societies

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 07 June 1982

    Permissions

    Request permissions for this article.

    Check for updates

    Qualifiers

    • Research-article

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)51
    • Downloads (Last 6 weeks)11
    Reflects downloads up to 19 Feb 2025

    Other Metrics

    Citations

    Cited By

    View all

    View Options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Login options

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media