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View all- Allen J(1985)Computer architecture for digital signal processingProceedings of the IEEE10.1109/PROC.1985.1321873:5(852-873)Online publication date: 1985
A scalable, distributed, processor architecture is presented that emphasizes on high performance computing for digital signal processing applications by combining high frequency design techniques with a very high degree of parallel processing on a chip. ...
A scalable, distributed, processor architecture is presented that emphasizes on high performance computing for digital signal processing applications by combining high frequency design techniques with a very high degree of parallel processing on a chip. ...
To improve the performance of systolic array processors, this paper designs and implements a novel architecture which supports dynamic dataflows. First, we design three typical systolic array processors, including the output stationary,...
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