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Efficient and accurate eye diagram prediction for high speed signaling

Published: 10 November 2008 Publication History

Abstract

This paper introduces an accumulative prediction method to predict the eye diagram for high speed signaling systems. We use the step responses of pull-up and pull-down to extract the worst-case eye diagram, including the eye height and jitter. Furthermore, the method produces the input patterns of the worst-case intersymbol interference. The algorithm handles signals of either symmetric or asymmetric rise/fall time. Experimental results demonstrate the accuracy and efficiency of the proposed method.

References

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V. Stojanovic and M. Horowitz, "Modeling and analysis of high-speed links," in Proc. IEEE Custom Integrated Circuits Conference, pp. 589--594, Sept. 2003.
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B. K. Casper, G. Balamurugan, J. E. Jaussi, J. Kennedy and M. Mansuri, "Future microprocessor interfaces: analysis, design and optimization," in Proc. IEEE Custom Integrated Circuits Conference, pp. 479--486, Sept. 2007.
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B. K. Casper, M. Haycock, and R. Mooney, "An accurate and efficient analysis method for multi-Gb/s chip-to-chip signaling schemes," in Proc. IEEE Symposium on VLSI Circuits, pp. 54--57, 2002.
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A. Tsuchiya, M. Hashimoto, and H. Onodera, "Optimal termination of on-chip transmission-lines for high-speed signaling," IEICE Trans. Electron., Vol. E90-C, No.6, pp. 1267--1273, June 2007.
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B. Analui, J. Buckwalter, and A. Hajimiri, "Data-dependent jitter in serial communications," IEEE Trans. Microwave Theory Tech., Vol. 53, No. 11, pp. 1841--1844, Nov. 2005.
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H. Zhu, C. K. Cheng, A. Deutsch, and G. Katopis, "Predicting and optimizing jitter and eye-opening based on bitonic step response," in Proc. IEEE EPEP'2007, pp. 155--158, Oct. 2007.
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R. D. Washburn and R. F. McClanahan, "Enhanced Timing margin memory interface," United States Patent, 2007.
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IBM Corp., PowerSPICE: User's Guide, Version 2.0, Nov. 2005
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IBM Corp., "IBM electromagnetic field solver suite of tools," Available: http://www.alphaworks.ibm.com/tech/eip

Cited By

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  • (2018)Evolutionary design of high signal integrity interconnection based on eye-diagramArtificial Life and Robotics10.1007/s10015-018-0433-223:3(298-303)Online publication date: 1-Sep-2018
  • (2014)A zonotoped macromodeling for reachability verification of eye-diagram in high-speed I/O links with jitterProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691506(696-701)Online publication date: 3-Nov-2014
  • (2012)An on-chip global broadcast network design with equalized transmission lines in the 1024-core eraProceedings of the International Workshop on System Level Interconnect Prediction10.1145/2347655.2347660(11-18)Online publication date: 3-Jun-2012
  • Show More Cited By

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cover image ACM Conferences
ICCAD '08: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
November 2008
855 pages
ISBN:9781424428205

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IEEE Press

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Published: 10 November 2008

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ASE08
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ASE08: The International Conference on Computer-Aided Design
November 10 - 13, 2008
California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

View all
  • (2018)Evolutionary design of high signal integrity interconnection based on eye-diagramArtificial Life and Robotics10.1007/s10015-018-0433-223:3(298-303)Online publication date: 1-Sep-2018
  • (2014)A zonotoped macromodeling for reachability verification of eye-diagram in high-speed I/O links with jitterProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691506(696-701)Online publication date: 3-Nov-2014
  • (2012)An on-chip global broadcast network design with equalized transmission lines in the 1024-core eraProceedings of the International Workshop on System Level Interconnect Prediction10.1145/2347655.2347660(11-18)Online publication date: 3-Jun-2012
  • (2011)Placement and beyond in honor of Ernest S. KuhProceedings of the 2011 international symposium on Physical design10.1145/1960397.1960402(5-8)Online publication date: 27-Mar-2011
  • (2009)Prediction of high-performance on-chip global interconnectionProceedings of the 11th international workshop on System level interconnect prediction10.1145/1572471.1572482(61-68)Online publication date: 26-Jul-2009

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