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Lightweight secure PUFs

Published: 10 November 2008 Publication History

Abstract

To ensure security and robustness of the next generation of Physically Unclonable Functions (PUFs), we have developed a new methodology for PUF design. Our approach employs integration of three key principles: (i) inclusion of multiple delay lines for creation of each response bit; (ii) transformations and combination of the challenge bits; and (iii) combination of the outputs from multiple delay lines; to create modular, easy to parameterize, secure and reliable PUF structures. Statistical analysis of the new structure and its comparison with existing PUFs indicates a significantly lower predictability, and higher resilience against circuit faults, reverse engineering and other security attacks.

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Cited By

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  • (2019)Adversarial Attack against Modeling Attack on PUFsProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317761(1-6)Online publication date: 2-Jun-2019
  • (2018)A machine learning attack resistant multi-PUF design on FPGAProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201628(97-104)Online publication date: 22-Jan-2018
  • (2018)EM based machine learning attack for XOR arbiter PUFProceedings of the 2nd International Conference on Machine Learning and Soft Computing10.1145/3184066.3184100(19-23)Online publication date: 2-Feb-2018
  • Show More Cited By

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Published In

cover image ACM Conferences
ICCAD '08: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
November 2008
855 pages
ISBN:9781424428205

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IEEE Press

Publication History

Published: 10 November 2008

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ASE08
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ASE08: The International Conference on Computer-Aided Design
November 10 - 13, 2008
California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

View all
  • (2019)Adversarial Attack against Modeling Attack on PUFsProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317761(1-6)Online publication date: 2-Jun-2019
  • (2018)A machine learning attack resistant multi-PUF design on FPGAProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201628(97-104)Online publication date: 22-Jan-2018
  • (2018)EM based machine learning attack for XOR arbiter PUFProceedings of the 2nd International Conference on Machine Learning and Soft Computing10.1145/3184066.3184100(19-23)Online publication date: 2-Feb-2018
  • (2017)Fault diagnosis of arbiter physical unclonable functionProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130479(428-433)Online publication date: 27-Mar-2017
  • (2016)Estimating delay differences of arbiter PUFs using silicon dataProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2971934(543-546)Online publication date: 14-Mar-2016
  • (2016)POSTERProceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security10.1145/2976749.2989039(1751-1753)Online publication date: 24-Oct-2016
  • (2016)MEMS Gyroscopes as Physical Unclonable FunctionsProceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security10.1145/2976749.2978295(591-602)Online publication date: 24-Oct-2016
  • (2016)DCPUFProceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/2847263.2847312(279-279)Online publication date: 21-Feb-2016
  • (2016)Theory and Application of Delay Constraints in Arbiter PUFACM Transactions on Embedded Computing Systems10.1145/281562115:1(1-20)Online publication date: 28-Jan-2016
  • (2015)A Novel Memristor-Based Hardware Security PrimitiveACM Transactions on Embedded Computing Systems10.1145/273628514:3(1-20)Online publication date: 21-Apr-2015
  • Show More Cited By

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