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View all- Mohanty SSingh JKougianos EPradhan D(2012)Statistical DOE-ILP based power-performance-process (P3) optimization of nano-CMOS SRAMIntegration, the VLSI Journal10.1016/j.vlsi.2011.07.00145:1(33-45)Online publication date: 1-Jan-2012
- Mohanty SKougianos E(2011)PVT-tolerant 7-Transistor SRAM Optimization via Polynomial RegressionProceedings of the 2011 International Symposium on Electronic System Design10.1109/ISED.2011.11(39-44)Online publication date: 19-Dec-2011
- Thakral GMohanty SGhai DPradhan D(2010)P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP2010 11th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2010.5450470(176-183)Online publication date: Mar-2010