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Area and power consumption estimations at system level with SystemQ 2.0

Published: 02 March 2009 Publication History

Abstract

Systems-on-Chip (SoC) integrate a complete electronic system in a single integrated circuit. SoCs typically comprise processors, hardware accelerators, memories, and on-chip interconnects. These increasingly complex systems must fulfill many requirements, such as high data throughput, low latency, small area, as well as low power consumption and dissipation.
In this paper we show how to evaluate an SoC at Electronic System Level (ESL). We use our performance evaluation framework SystemQ 2.0 not only to analyze common performance metrics, e. g. throughput, latency, and resource utilization, but also to perform area and power estimations at system level. The foundation of our estimations is a large amount of data from synthesized and physically implemented hardware components. From that we build a set of formulas to be integrated into SystemQ.
In a case study we show the area and power consumption estimations of a complex SoC interconnect. We reveal how the area and power data are gathered and integrated into SystemQ. Based on real test cases we compare the transistor-level data with the system-level results from SystemQ. It will be shown that the error for the area estimations is up to 6.3 % for single components. The complete system is tested with two standard-cell libraries, whereas the error is 17.0 % and 28.1%, respectively. The power estimation error is 11.5% at component level.

References

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Cited By

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  • (2010)Design space exploration and performance evaluation at electronic system level for NoC-based MPSoCProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133500(336-339)Online publication date: 7-Nov-2010

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Published In

cover image Guide Proceedings
Simutools '09: Proceedings of the 2nd International Conference on Simulation Tools and Techniques
March 2009
720 pages
ISBN:9789639799455

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  • Create-Net
  • ICST

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ICST (Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering)

Brussels, Belgium

Publication History

Published: 02 March 2009

Author Tags

  1. SystemQ
  2. area and power estimation
  3. electronic system level
  4. modeling
  5. synthesis

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  • (2010)Design space exploration and performance evaluation at electronic system level for NoC-based MPSoCProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133500(336-339)Online publication date: 7-Nov-2010

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