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Why STM can be more than a research toy

Published: 01 April 2011 Publication History

Abstract

Despite earlier claims, Software Transactional Memory outperforms sequential code.

References

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  • (2021)Synchronization Strategies on Many-Core SMT Systems2021 IEEE 33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/SBAC-PAD53543.2021.00017(54-63)Online publication date: Oct-2021
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Published In

cover image Communications of the ACM
Communications of the ACM  Volume 54, Issue 4
April 2011
139 pages
ISSN:0001-0782
EISSN:1557-7317
DOI:10.1145/1924421
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 April 2011
Published in CACM Volume 54, Issue 4

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  • (2023)Block-STMProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577524(232-244)Online publication date: 25-Feb-2023
  • (2023)On the impact of mode transition on phased transactional memory performanceJournal of Parallel and Distributed Computing10.1016/j.jpdc.2022.11.009173(126-139)Online publication date: Mar-2023
  • (2021)Synchronization Strategies on Many-Core SMT Systems2021 IEEE 33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/SBAC-PAD53543.2021.00017(54-63)Online publication date: Oct-2021
  • (2021)Improving Phased Transactional Memory via Commit Throughput and Capacity Estimation2021 IEEE 33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/SBAC-PAD53543.2021.00016(44-53)Online publication date: Oct-2021
  • (2020)Convoider: A Concurrency Bug Avoider Based on Transparent Software Transactional MemoryInternational Journal of Parallel Programming10.1007/s10766-019-00642-148:1(32-60)Online publication date: 1-Feb-2020
  • (2019)Concurrency Bug Avoiding Based on Optimized Software Transactional MemoryScientific Programming10.1155/2019/94043232019Online publication date: 1-Jan-2019
  • (2019)MV-RLUProceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3297858.3304040(779-792)Online publication date: 4-Apr-2019
  • (2018)Virtual machine design for parallel dynamic programming languagesProceedings of the ACM on Programming Languages10.1145/32764792:OOPSLA(1-25)Online publication date: 24-Oct-2018
  • (2018)On Approximate Speculative Lock ElisionIEEE Transactions on Multi-Scale Computing Systems10.1109/TMSCS.2017.27734884:2(141-151)Online publication date: 1-Apr-2018
  • (2018)Work-in-Progress: Lock-Based Software Transactional Memory for Real-Time Systems2018 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS.2018.00026(147-150)Online publication date: Dec-2018
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