skip to main content
10.1145/1958746.1958758acmconferencesArticle/Chapter ViewAbstractPublication PagesicpeConference Proceedingsconference-collections
abstract

Relative roles of instruction count and cycles per instruction in WCET estimation

Published:30 September 2011Publication History

ABSTRACT

Most of the existing WCET estimation methods directly estimate execution time, ET, in cycles. We propose to study ET as a product of two factors, ET = IC * CPI, where IC is instruction count and CPI is cycles per instruction. Considering directly the estimation of ET may lead to a highly pessimistic estimate since implicitly these methods may be using worst case IC and worst case CPI. We hypothesize that there exists a functional relationship between CPI and IC such that CPI=f(IC). This is ascertained by computing the covariance matrix and studying the scatter plots of CPI versus IC. IC and CPI values are obtained by running benchmarks with a large number of inputs using the cycle accurate architectural simulator, Simplescalar on two different architectures. It is shown that the benchmarks can be grouped into different classes based on the CPI versus IC relationship. For some benchmarks like FFT, FIR etc., both IC and CPI are almost a constant irrespective of the input. There are other benchmarks that exhibit a direct or an inverse relationship between CPI and IC. In such a case, one can predict CPI for a given IC as CPI=f(IC). We derive the theoretical worst case IC for a program, denoted as SWIC, using integer linear programming(ILP) and estimate WCET as SWIC*f(SWIC). However, if CPI decreases sharply with IC then measured maximum cycles is observed to be a better estimate. For certain other benchmarks, it is observed that the CPI versus IC relationship is either random or CPI remains constant with varying IC. In such cases, WCET is estimated as the product of SWIC and measured maximum CPI. It is observed that use of the proposed method results in tighter WCET estimates than Chronos, a static WCET analyzer, for most benchmarks for the two architectures considered in this paper.

References

  1. "http://www.comp.nus.edu.sg/~rpembed/chronos/ download.html".Google ScholarGoogle Scholar
  2. "http://www.eecs.umich.edu/mibench".Google ScholarGoogle Scholar
  3. "http://www.mrtc.mdh.se/projects/wcet".Google ScholarGoogle Scholar
  4. A. Colin et al. Experimental evaluation of code properties for WCET analysis. In RTSS, pages 190-199, 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. A. Dupuy et al. An empirical evaluation of the mc/dc coverage criterion on the hete-2 satellite software. In DASC, 2000.Google ScholarGoogle ScholarCross RefCross Ref
  6. G. Bernat et al. pWCET: a tool for probabilistic worst case execution time analysis of real-time systems. In Technical Report YCS-2003-353, Univ. of York, UK.Google ScholarGoogle Scholar
  7. J. Hansen et al. Statistical based WCET estimation and validation. In ECRTS, pages 123-133, 2009.Google ScholarGoogle Scholar
  8. M. Zolda et al. Towards adaptable control flow segmentation for measurement-based execution time analysis. In RTNS, 2009.Google ScholarGoogle Scholar
  9. Matteo Corti et al. Approximation of worst-case execution time for preemptive multitasking systems. In LCTES, pages 178-198, 2000. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. P. Keim et al. Extending the path analysis technique to obtain a soft WCET. In ECRTS, pages 134-142, 2009.Google ScholarGoogle Scholar
  11. R. Wilhelm et al. The worst-case execution time problem- overview of methods and survey of tools. ACM Trans. Embedded. Comp. Syst., 7(3):36-53, April 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. S. B?unte et al. A benchmarking suite for measurement based WCET analysis. In ICSTW, pages 353-356, 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. V. Suhendra et al. Efficient detection and exploitation of infeasible paths for software timing analysis. In DAC, pages 358-363, 2006. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Relative roles of instruction count and cycles per instruction in WCET estimation

    Recommendations

    Comments

    Login options

    Check if you have access through your login credentials or your institution to get full access on this article.

    Sign in
    • Published in

      cover image ACM Conferences
      ICPE '11: Proceedings of the 2nd ACM/SPEC International Conference on Performance engineering
      March 2011
      470 pages
      ISBN:9781450305198
      DOI:10.1145/1958746

      Copyright © 2011 Authors

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 30 September 2011

      Permissions

      Request permissions about this article.

      Request Permissions

      Check for updates

      Qualifiers

      • abstract

      Acceptance Rates

      Overall Acceptance Rate252of851submissions,30%

    PDF Format

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader