Abstract
A Google search for "Threads are evil" generates 18,000 hits, but threads are ubiquitous. Almost all of the processes running on a modern Windows PC use them. Software threads are typically how programmers get machines with multiple cores to work together to solve problems faster. And often they are what allow user interfaces to remain responsive while the application performs a background calculation.
- Adve, S. V., Boehm, H.-J. 2010. Memory models: a case for rethinking parallel languages and hardware. Communications of the ACM 53(8): 90-101. Google ScholarDigital Library
- Adve, S. V., Gharachorloo, K. 1996. Shared memory consistency models: a tutorial. IEEE Computer 29(12): 66-76. Google ScholarDigital Library
- Bocchinoetal, R. 2009. A type and effect system for deterministic parallel Java. In Proceedings of the International Conference on Object-Oriented Programming, Systems, Languages, and Applications. Google ScholarDigital Library
- Boehm, H.-J. 2011. How to miscompile programs with "benig" data races. In HotPar (Hot Topics in Parallelism). Google ScholarDigital Library
- Elmas, T., Qadeer, S., Tasiran, S. 2007. Goldilocks: a race and transaction-aware Java runtime. In Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation: 245-255. Google ScholarDigital Library
- Flanagan, C., Freund, S. 2009. FastTrack: efficient and precise dynamic race detection. In Proceedings of the Conference on Programming Language Design and Implementation. Google ScholarDigital Library
- Lucia, B., Ceze, L., Strauss, K., Qadeer, S., Boehm, H.-J. 2010. Conflict exceptions: providing simple concurrent language semantics with precise hardware exceptions. In Proceedings of the International Symposium on Computer Architecture. Google ScholarDigital Library
- Sevcik, J., Aspinall, D. 2008. On validity of program transformations in the Java memory model. In European Conference on Object-oriented Programming: 27-51. Google ScholarDigital Library
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