- 1.Barton D.L. Steps Toward a More Precise Relationship Between Elements of the Application Protocol Models and Formal Systems Specifications. Proceedings EII'94 Conference, The Claremont Resort, Oakland, California, 4-5 May, 1994, pp 79-88Google Scholar
- 2.Borger E., Glasser U. and Wolfgang M. The Semantics of Behavioural VHDL'93 Descriptions. Proceedings EURO-DAC'94/EURO- VHDL'94, Grenoble, September 19-23, IEEE Press 1994, pp 500-505 Google ScholarDigital Library
- 3.Standards for Electronic Design Automation, Release 1.0. CAD Framework Initiative, Inc., 4030 W.Braker Lane, Suite 550, Austin, Texas 78759 U.S.A., 1992Google Scholar
- 4.Coyne R.D. et al. Knowledge-BasedDesign Systems, Addison Wesley, 1990 Google ScholarDigital Library
- 5.Electronic Design Interchange Format Version 300. Electronic Industries Association / EDIF Division, 2001 Pennsylvania Avenue, N.W., Washington, DC 20006, U.S.A., EIA-618, 1993Google Scholar
- 6.EXPRESS Language Reference Manual. ISO 10303: Part 11 Version N14, April 1991Google Scholar
- 7.Giumale C. A. and Kahn H.J. An Information Model of Time. Proc. IEEE/ACM Design Automation Conference, Dallas 14-18 June 1993, pp 668-672 Google ScholarDigital Library
- 8.Giumale C. A. An Information Model of VHDL'87 (Draft). University of Manchester, August 1994Google Scholar
- 9.Lopez Jet. al Integrating Tools in a VHDL Framework. Proceedings EII'94 Conference, The Claremont Resort, Oakland, California, 4-5 May, 1994, pp 33-41Google Scholar
- 10.Olcoz S. and Colom J.M. The Discrete Event Simulation Semantics of VHDL. Proceedings of the International Conference of Simulation and Hardware Description Languages, Tempe, Arizona, January 1994, pp 128-134Google Scholar
- 11.Schaefers L., Mueller W. and Wilkes W. Examination of Concepts in Existing Modelling Languages / Methodologies to Model Behavioural Semantics. Deliverable Report ECIP2/HU/008-1, 1992Google Scholar
- 12.VHDL Language Reference Manual (IEEE Std 1076-1987/1993). IEEE, Inc., 345 East 47th Street, New York, NY 10017, USA, 1988/1993Google Scholar
- 13.VIFASG 1076 VHDL Procedural Interface (Draft Version), VHDL Schema Definition (Draft Version). VIFASG Subgroup on Intermediate Form Definition, November 23, December 11, 1990Google Scholar
Index Terms
- Information models of VHDL
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