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View all- Mohanty JMahapatra K(2013)Security paradigm of FPGA against Differential Power Analysis attack2013 Annual IEEE India Conference (INDICON)10.1109/INDCON.2013.6725875(1-5)Online publication date: Dec-2013
Security protection on FPGA against differential power analysis attacks
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References
[1]
E. Brier, C. Clavier, and F. Olivier. Correlation power analysis with a leakage model. In Cryptographic Hardware and Embedded Systems, pages 16-29, 2004.
[2]
J. Chen, M. Dubois, and P. Stenstrom. Simwattch: Integrating complete-system and user-level performance and power simulators. Micro, IEEE, 27(4):34-48, 2007.
[3]
C. Clavier, J.-S. Coron, and N. Dabbous. Differential power analysis in the presence of hardware countermeasures. In Cryptographic Hardware and Embedded Systems, pages 252-263, 2000.
[4]
J.-S. Coron. A new DPA countermeasure based on permutation tables. In Security and Cryptography for Networks, pages 278-292, 2008.
[5]
J. Daemen and V. Rijmen. Resistance against implementation attacks: A comparative study of the AES proposals. In Second Advanced Encryption Standard Candidate Conference, pages 122-132, 1999.
[6]
L. Goubin and J. Patarin. DES and differential power analysis the "duplication" method. In Cryptographic Hardware and Embedded Systems, pages 158-172, 1999.
[7]
S. Guilley, L. Sauvage, F. Flament, V.-N. Vong, P. Hoogvorst, and R. Pacalet. Evaluation of power constant dual-rail logics countermeasures against DPA with design time security metrics. IEEE Transactions on Computers, 59(9):1250-1263, September 2010.
[8]
M. R. Guthaus, J. S. Ringenberg, D. Ernst, T. M. Austin, T. Mudge, and R. Brown. Mibench: A free, commercially representative embedded benchmark suite. In IEEE International Workshop on Workload Characterization, 2001. WWC-4, pages 3-14, 2001.
[9]
P. C. Kocher, J. M. Jaffe, and B. C. Jun. Differential power analysis. In Advance in Cryptography - CRYPTO 1999, pages 388-397, 1999.
[10]
S. Mangard, E. Oswald, and T. Popp. Power analysis attacks: revealing the secrets of smart cards. Springer-Verlag, 2007.
[11]
A. Moradi, M. Taghi, M. Shalmani, and M. Salmasizadeh. Dual-rail transition logic: A logic style for counteracting power analysis attacks. Computers and Electrical Engineering, 35(2):359-369, March 2009.
[12]
J. S. Pan, B. L. Guo, and A. Abraham. Resistance DPA of RSA on smartcard. In International Conference on Information Assurance and Security, pages 406-409, 2009.
[13]
M. Qiu and E. H.-M. Sha. Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems. ACM Transactions on Design Automation of Electronic Systems (TODAES), 14(2):Article 25, 1-30, Mar. 2009 (TODAES 2011 Best Paper Award).
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Published: 12 October 2011
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View all- Mohanty JMahapatra K(2013)Security paradigm of FPGA against Differential Power Analysis attack2013 Annual IEEE India Conference (INDICON)10.1109/INDCON.2013.6725875(1-5)Online publication date: Dec-2013
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